probably related to the config overlay: I have a bananapi R4, I installed @dangowrt 's openwrt bpi version, and installed 3 wifi pci cards:
- 1 ath10k qca988x in mpci slot 1
- 1 mt7915 in mpci slot 2
- 1 ath11k using a m.2 adapter in the nvme slot. the issue is: I’m missing a PCI card, the kernel says its PCIe link status is down:
[ 2.281790] phy phy-soc:[email protected]: type_sw - reg 0x218, index 0
[ 2.288808] mtk-pcie-gen3 11280000.pcie: host bridge /soc/pcie@11280000 ranges:
[ 2.296120] mtk-pcie-gen3 11280000.pcie: Parsing ranges property...
[ 2.302388] mtk-pcie-gen3 11280000.pcie: IO 0x0020000000..0x00201fffff -> 0x0020000000
[ 2.310821] mtk-pcie-gen3 11280000.pcie: MEM 0x0020200000..0x0027ffffff -> 0x0020200000
[ 2.331228] mmc0: host does not support reading read-only switch, assuming write-enable
[ 2.341031] mmc0: new high speed SDXC card at address 2103
[ 2.347050] mmcblk0: mmc0:2103 APPSD 999 GiB
[ 2.354847] Alternate GPT is invalid, using primary GPT.
[ 2.360671] mmcblk0: p1 p2 p3 p4 p5 p6 p7
[ 2.657215] mtk-pcie-gen3 11280000.pcie: PCIe link down, current LTSSM state: detect.quiet (0x0)
[ 2.666014] mtk-pcie-gen3: probe of 11280000.pcie failed with error -110
[ 2.673059] mtk-pcie-gen3 11290000.pcie: host bridge /soc/pcie@11290000 ranges:
[ 2.680374] mtk-pcie-gen3 11290000.pcie: Parsing ranges property...
[ 2.686637] mtk-pcie-gen3 11290000.pcie: IO 0x0028000000..0x00281fffff -> 0x0028000000
[ 2.695074] mtk-pcie-gen3 11290000.pcie: MEM 0x0028200000..0x002fffffff -> 0x0028200000
[ 2.954801] mtk-pcie-gen3 11290000.pcie: set IO trans window[0]: cpu_addr = 0x28000000, pci_addr = 0x28000000, size = 0x200000
[ 2.966183] mtk-pcie-gen3 11290000.pcie: set MEM trans window[1]: cpu_addr = 0x28200000, pci_addr = 0x28200000, size = 0x200000
[ 2.977647] mtk-pcie-gen3 11290000.pcie: set MEM trans window[2]: cpu_addr = 0x28400000, pci_addr = 0x28400000, size = 0x400000
[ 2.989110] mtk-pcie-gen3 11290000.pcie: set MEM trans window[3]: cpu_addr = 0x28800000, pci_addr = 0x28800000, size = 0x800000
[ 3.000572] mtk-pcie-gen3 11290000.pcie: set MEM trans window[4]: cpu_addr = 0x29000000, pci_addr = 0x29000000, size = 0x1000000
[ 3.012122] mtk-pcie-gen3 11290000.pcie: set MEM trans window[5]: cpu_addr = 0x2a000000, pci_addr = 0x2a000000, size = 0x2000000
[ 3.023670] mtk-pcie-gen3 11290000.pcie: set MEM trans window[6]: cpu_addr = 0x2c000000, pci_addr = 0x2c000000, size = 0x4000000
[ 3.035333] mtk-pcie-gen3 11290000.pcie: PCI host bridge to bus 0002:00
[ 3.041941] pci_bus 0002:00: root bus resource [bus 00-ff]
[ 3.047424] pci_bus 0002:00: root bus resource [io 0x200000-0x3fffff] (bus address [0x28000000-0x281fffff])
[ 3.057242] pci_bus 0002:00: root bus resource [mem 0x28200000-0x2fffffff]
[ 3.064104] pci_bus 0002:00: scanning bus
[ 3.068125] pci 0002:00:00.0: [14c3:7988] type 01 class 0x060400
[ 3.074132] pci 0002:00:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
[ 3.080970] pci 0002:00:00.0: PME# supported from D0 D3hot D3cold
[ 3.087053] pci 0002:00:00.0: PME# disabled
[ 3.092351] pci_bus 0002:00: fixups for bus
[ 3.096527] pci 0002:00:00.0: scanning [bus 00-00] behind bridge, pass 0
[ 3.103220] pci 0002:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[ 3.111219] pci 0002:00:00.0: scanning [bus 00-00] behind bridge, pass 1
[ 3.117954] pci_bus 0002:01: scanning bus
[ 3.121972] pci 0002:01:00.0: [17cb:1103] type 00 class 0x028000
[ 3.127989] pci 0002:01:00.0: reg 0x10: [mem 0x00000000-0x001fffff 64bit]
[ 3.134882] pci 0002:01:00.0: PME# supported from D0 D3hot D3cold
[ 3.140969] pci 0002:01:00.0: PME# disabled
[ 3.167229] pci_bus 0002:01: fixups for bus
[ 3.171402] pci_bus 0002:01: bus scan returning with max=01
[ 3.176962] pci_bus 0002:01: busn_res: [bus 01-ff] end is updated to 01
[ 3.183573] pci_bus 0002:00: bus scan returning with max=01
[ 3.189145] pci 0002:00:00.0: BAR 8: assigned [mem 0x28200000-0x283fffff]
[ 3.195922] pci 0002:00:00.0: BAR 0: assigned [mem 0x28400000-0x28407fff 64bit]
[ 3.203227] pci 0002:01:00.0: BAR 0: assigned [mem 0x28200000-0x283fffff 64bit]
[ 3.210533] pci 0002:00:00.0: PCI bridge to [bus 01]
[ 3.215487] pci 0002:00:00.0: bridge window [mem 0x28200000-0x283fffff]
[ 3.222275] pci 0002:00:00.0: Max Payload Size set to 256/ 256 (was 128), Max Read Rq 256
[ 3.230715] pci 0002:01:00.0: Max Payload Size set to 128/ 128 (was 128), Max Read Rq 128
[ 3.239206] pcieport 0002:00:00.0: assign IRQ: got 110
[ 3.244337] pcieport 0002:00:00.0: enabling device (0000 -> 0002)
[ 3.250430] pcieport 0002:00:00.0: enabling bus mastering
[ 3.256079] mtk-pcie-gen3 11290000.pcie: msi#0x0 address_hi 0x0 address_lo 0x11290c00 data 0
[ 3.264512] mtk-pcie-gen3 11290000.pcie: msi#0x1 address_hi 0x0 address_lo 0x11290c00 data 1
[ 3.272938] mtk-pcie-gen3 11290000.pcie: msi#0x2 address_hi 0x0 address_lo 0x11290c00 data 2
[ 3.281362] mtk-pcie-gen3 11290000.pcie: msi#0x3 address_hi 0x0 address_lo 0x11290c00 data 3
[ 3.289793] mtk-pcie-gen3 11290000.pcie: msi#0x4 address_hi 0x0 address_lo 0x11290c00 data 4
[ 3.298218] mtk-pcie-gen3 11290000.pcie: msi#0x5 address_hi 0x0 address_lo 0x11290c00 data 5
[ 3.306641] mtk-pcie-gen3 11290000.pcie: msi#0x6 address_hi 0x0 address_lo 0x11290c00 data 6
[ 3.315066] mtk-pcie-gen3 11290000.pcie: msi#0x7 address_hi 0x0 address_lo 0x11290c00 data 7
[ 3.323490] mtk-pcie-gen3 11290000.pcie: msi#0x8 address_hi 0x0 address_lo 0x11290c00 data 8
[ 3.331915] mtk-pcie-gen3 11290000.pcie: msi#0x9 address_hi 0x0 address_lo 0x11290c00 data 9
[ 3.340339] mtk-pcie-gen3 11290000.pcie: msi#0xa address_hi 0x0 address_lo 0x11290c00 data 10
[ 3.348851] mtk-pcie-gen3 11290000.pcie: msi#0xb address_hi 0x0 address_lo 0x11290c00 data 11
[ 3.357362] mtk-pcie-gen3 11290000.pcie: msi#0xc address_hi 0x0 address_lo 0x11290c00 data 12
[ 3.365871] mtk-pcie-gen3 11290000.pcie: msi#0xd address_hi 0x0 address_lo 0x11290c00 data 13
[ 3.374382] mtk-pcie-gen3 11290000.pcie: msi#0xe address_hi 0x0 address_lo 0x11290c00 data 14
[ 3.382894] mtk-pcie-gen3 11290000.pcie: msi#0xf address_hi 0x0 address_lo 0x11290c00 data 15
[ 3.391405] mtk-pcie-gen3 11290000.pcie: msi#0x10 address_hi 0x0 address_lo 0x11290c00 data 16
[ 3.400003] mtk-pcie-gen3 11290000.pcie: msi#0x11 address_hi 0x0 address_lo 0x11290c00 data 17
[ 3.408603] mtk-pcie-gen3 11290000.pcie: msi#0x12 address_hi 0x0 address_lo 0x11290c00 data 18
[ 3.417201] mtk-pcie-gen3 11290000.pcie: msi#0x13 address_hi 0x0 address_lo 0x11290c00 data 19
[ 3.425797] mtk-pcie-gen3 11290000.pcie: msi#0x14 address_hi 0x0 address_lo 0x11290c00 data 20
[ 3.434394] mtk-pcie-gen3 11290000.pcie: msi#0x15 address_hi 0x0 address_lo 0x11290c00 data 21
[ 3.442991] mtk-pcie-gen3 11290000.pcie: msi#0x16 address_hi 0x0 address_lo 0x11290c00 data 22
[ 3.451590] mtk-pcie-gen3 11290000.pcie: msi#0x17 address_hi 0x0 address_lo 0x11290c00 data 23
[ 3.460188] mtk-pcie-gen3 11290000.pcie: msi#0x18 address_hi 0x0 address_lo 0x11290c00 data 24
[ 3.468786] mtk-pcie-gen3 11290000.pcie: msi#0x19 address_hi 0x0 address_lo 0x11290c00 data 25
[ 3.477384] mtk-pcie-gen3 11290000.pcie: msi#0x1a address_hi 0x0 address_lo 0x11290c00 data 26
[ 3.485980] mtk-pcie-gen3 11290000.pcie: msi#0x1b address_hi 0x0 address_lo 0x11290c00 data 27
[ 3.494578] mtk-pcie-gen3 11290000.pcie: msi#0x1c address_hi 0x0 address_lo 0x11290c00 data 28
[ 3.503176] mtk-pcie-gen3 11290000.pcie: msi#0x1d address_hi 0x0 address_lo 0x11290c00 data 29
[ 3.511774] mtk-pcie-gen3 11290000.pcie: msi#0x1e address_hi 0x0 address_lo 0x11290c00 data 30
[ 3.520372] mtk-pcie-gen3 11290000.pcie: msi#0x1f address_hi 0x0 address_lo 0x11290c00 data 31
[ 3.529268] mtk-pcie-gen3 11290000.pcie: msi#0x0 address_hi 0x0 address_lo 0x11290c00 data 0
[ 3.537759] pcieport 0002:00:00.0: PME: Signaling with IRQ 111
[ 3.543689] pcieport 0002:00:00.0: AER: enabled with IRQ 111
[ 3.549389] pcieport 0002:00:00.0: saving config space at offset 0x0 (reading 0x798814c3)
[ 3.557561] pcieport 0002:00:00.0: saving config space at offset 0x4 (reading 0x100406)
[ 3.565550] pcieport 0002:00:00.0: saving config space at offset 0x8 (reading 0x6040001)
[ 3.573630] pcieport 0002:00:00.0: saving config space at offset 0xc (reading 0x10000)
[ 3.581536] pcieport 0002:00:00.0: saving config space at offset 0x10 (reading 0x28400004)
[ 3.589791] pcieport 0002:00:00.0: saving config space at offset 0x14 (reading 0x0)
[ 3.597436] pcieport 0002:00:00.0: saving config space at offset 0x18 (reading 0x10100)
[ 3.605425] pcieport 0002:00:00.0: saving config space at offset 0x1c (reading 0x1f1)
[ 3.613244] pcieport 0002:00:00.0: saving config space at offset 0x20 (reading 0x28302820)
[ 3.621497] pcieport 0002:00:00.0: saving config space at offset 0x24 (reading 0x1fff1)
[ 3.629488] pcieport 0002:00:00.0: saving config space at offset 0x28 (reading 0x0)
[ 3.637130] pcieport 0002:00:00.0: saving config space at offset 0x2c (reading 0x0)
[ 3.644775] pcieport 0002:00:00.0: saving config space at offset 0x30 (reading 0x0)
[ 3.652420] pcieport 0002:00:00.0: saving config space at offset 0x34 (reading 0x80)
[ 3.660153] pcieport 0002:00:00.0: saving config space at offset 0x38 (reading 0x0)
[ 3.667799] pcieport 0002:00:00.0: saving config space at offset 0x3c (reading 0x2016e)
[ 3.676057] mtk-pcie-gen3 11300000.pcie: host bridge /soc/pcie@11300000 ranges:
[ 3.683367] mtk-pcie-gen3 11300000.pcie: Parsing ranges property...
[ 3.689634] mtk-pcie-gen3 11300000.pcie: IO 0x0030000000..0x00301fffff -> 0x0030000000
[ 3.698067] mtk-pcie-gen3 11300000.pcie: MEM 0x0030200000..0x0037ffffff -> 0x0030200000
[ 3.939877] mtk-pcie-gen3 11300000.pcie: set IO trans window[0]: cpu_addr = 0x30000000, pci_addr = 0x30000000, size = 0x200000
[ 3.951260] mtk-pcie-gen3 11300000.pcie: set MEM trans window[1]: cpu_addr = 0x30200000, pci_addr = 0x30200000, size = 0x200000
[ 3.962724] mtk-pcie-gen3 11300000.pcie: set MEM trans window[2]: cpu_addr = 0x30400000, pci_addr = 0x30400000, size = 0x400000
[ 3.974186] mtk-pcie-gen3 11300000.pcie: set MEM trans window[3]: cpu_addr = 0x30800000, pci_addr = 0x30800000, size = 0x800000
[ 3.985648] mtk-pcie-gen3 11300000.pcie: set MEM trans window[4]: cpu_addr = 0x31000000, pci_addr = 0x31000000, size = 0x1000000
[ 3.997197] mtk-pcie-gen3 11300000.pcie: set MEM trans window[5]: cpu_addr = 0x32000000, pci_addr = 0x32000000, size = 0x2000000
[ 4.008751] mtk-pcie-gen3 11300000.pcie: set MEM trans window[6]: cpu_addr = 0x34000000, pci_addr = 0x34000000, size = 0x4000000
[ 4.020401] mtk-pcie-gen3 11300000.pcie: PCI host bridge to bus 0000:00
[ 4.027006] pci_bus 0000:00: root bus resource [bus 00-ff]
[ 4.032487] pci_bus 0000:00: root bus resource [io 0x400000-0x5fffff] (bus address [0x30000000-0x301fffff])
[ 4.042301] pci_bus 0000:00: root bus resource [mem 0x30200000-0x37ffffff]
[ 4.049166] pci_bus 0000:00: scanning bus
[ 4.053184] pci 0000:00:00.0: [14c3:7988] type 01 class 0x060400
[ 4.059197] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
[ 4.066031] pci 0000:00:00.0: PME# supported from D0 D3hot D3cold
[ 4.072117] pci 0000:00:00.0: PME# disabled
[ 4.077407] pci_bus 0000:00: fixups for bus
[ 4.081582] pci 0000:00:00.0: scanning [bus 00-00] behind bridge, pass 0
[ 4.088274] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[ 4.096269] pci 0000:00:00.0: scanning [bus 00-00] behind bridge, pass 1
[ 4.103007] pci_bus 0000:01: scanning bus
[ 4.107028] pci 0000:01:00.0: [14c3:7915] type 00 class 0x000280
[ 4.113051] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x000fffff 64bit pref]
[ 4.120278] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x00003fff 64bit pref]
[ 4.127505] pci 0000:01:00.0: reg 0x20: [mem 0x00000000-0x00000fff 64bit pref]
[ 4.134817] pci 0000:01:00.0: supports D1 D2
[ 4.139078] pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold
[ 4.145682] pci 0000:01:00.0: PME# disabled
[ 4.177231] pci_bus 0000:01: fixups for bus
[ 4.181404] pci_bus 0000:01: bus scan returning with max=01
[ 4.186966] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
[ 4.193577] pci_bus 0000:00: bus scan returning with max=01
[ 4.199151] pci 0000:00:00.0: BAR 9: assigned [mem 0x30200000-0x303fffff 64bit pref]
[ 4.206882] pci 0000:00:00.0: BAR 0: assigned [mem 0x30400000-0x30407fff 64bit]
[ 4.214187] pci 0000:01:00.0: BAR 0: assigned [mem 0x30200000-0x302fffff 64bit pref]
[ 4.221930] pci 0000:01:00.0: BAR 2: assigned [mem 0x30300000-0x30303fff 64bit pref]
[ 4.229674] pci 0000:01:00.0: BAR 4: assigned [mem 0x30304000-0x30304fff 64bit pref]
[ 4.237416] pci 0000:00:00.0: PCI bridge to [bus 01]
[ 4.242372] pci 0000:00:00.0: bridge window [mem 0x30200000-0x303fffff 64bit pref]
[ 4.250113] pci 0000:00:00.0: Max Payload Size set to 256/ 256 (was 128), Max Read Rq 256
[ 4.258556] pci 0000:01:00.0: Max Payload Size set to 128/ 128 (was 128), Max Read Rq 128
[ 4.267045] pcieport 0000:00:00.0: assign IRQ: got 113
[ 4.272179] pcieport 0000:00:00.0: enabling device (0000 -> 0002)
[ 4.278272] pcieport 0000:00:00.0: enabling bus mastering
[ 4.283903] mtk-pcie-gen3 11300000.pcie: msi#0x0 address_hi 0x0 address_lo 0x11300c00 data 0
[ 4.292336] mtk-pcie-gen3 11300000.pcie: msi#0x1 address_hi 0x0 address_lo 0x11300c00 data 1
[ 4.300765] mtk-pcie-gen3 11300000.pcie: msi#0x2 address_hi 0x0 address_lo 0x11300c00 data 2
[ 4.309190] mtk-pcie-gen3 11300000.pcie: msi#0x3 address_hi 0x0 address_lo 0x11300c00 data 3
[ 4.317616] mtk-pcie-gen3 11300000.pcie: msi#0x4 address_hi 0x0 address_lo 0x11300c00 data 4
[ 4.326038] mtk-pcie-gen3 11300000.pcie: msi#0x5 address_hi 0x0 address_lo 0x11300c00 data 5
[ 4.334462] mtk-pcie-gen3 11300000.pcie: msi#0x6 address_hi 0x0 address_lo 0x11300c00 data 6
[ 4.342887] mtk-pcie-gen3 11300000.pcie: msi#0x7 address_hi 0x0 address_lo 0x11300c00 data 7
[ 4.351311] mtk-pcie-gen3 11300000.pcie: msi#0x8 address_hi 0x0 address_lo 0x11300c00 data 8
[ 4.359736] mtk-pcie-gen3 11300000.pcie: msi#0x9 address_hi 0x0 address_lo 0x11300c00 data 9
[ 4.368160] mtk-pcie-gen3 11300000.pcie: msi#0xa address_hi 0x0 address_lo 0x11300c00 data 10
[ 4.376670] mtk-pcie-gen3 11300000.pcie: msi#0xb address_hi 0x0 address_lo 0x11300c00 data 11
[ 4.385180] mtk-pcie-gen3 11300000.pcie: msi#0xc address_hi 0x0 address_lo 0x11300c00 data 12
[ 4.393691] mtk-pcie-gen3 11300000.pcie: msi#0xd address_hi 0x0 address_lo 0x11300c00 data 13
[ 4.402202] mtk-pcie-gen3 11300000.pcie: msi#0xe address_hi 0x0 address_lo 0x11300c00 data 14
[ 4.410713] mtk-pcie-gen3 11300000.pcie: msi#0xf address_hi 0x0 address_lo 0x11300c00 data 15
[ 4.419225] mtk-pcie-gen3 11300000.pcie: msi#0x10 address_hi 0x0 address_lo 0x11300c00 data 16
[ 4.427824] mtk-pcie-gen3 11300000.pcie: msi#0x11 address_hi 0x0 address_lo 0x11300c00 data 17
[ 4.436420] mtk-pcie-gen3 11300000.pcie: msi#0x12 address_hi 0x0 address_lo 0x11300c00 data 18
[ 4.445018] mtk-pcie-gen3 11300000.pcie: msi#0x13 address_hi 0x0 address_lo 0x11300c00 data 19
[ 4.453616] mtk-pcie-gen3 11300000.pcie: msi#0x14 address_hi 0x0 address_lo 0x11300c00 data 20
[ 4.462214] mtk-pcie-gen3 11300000.pcie: msi#0x15 address_hi 0x0 address_lo 0x11300c00 data 21
[ 4.470812] mtk-pcie-gen3 11300000.pcie: msi#0x16 address_hi 0x0 address_lo 0x11300c00 data 22
[ 4.479411] mtk-pcie-gen3 11300000.pcie: msi#0x17 address_hi 0x0 address_lo 0x11300c00 data 23
[ 4.488009] mtk-pcie-gen3 11300000.pcie: msi#0x18 address_hi 0x0 address_lo 0x11300c00 data 24
[ 4.496605] mtk-pcie-gen3 11300000.pcie: msi#0x19 address_hi 0x0 address_lo 0x11300c00 data 25
[ 4.505203] mtk-pcie-gen3 11300000.pcie: msi#0x1a address_hi 0x0 address_lo 0x11300c00 data 26
[ 4.513801] mtk-pcie-gen3 11300000.pcie: msi#0x1b address_hi 0x0 address_lo 0x11300c00 data 27
[ 4.522399] mtk-pcie-gen3 11300000.pcie: msi#0x1c address_hi 0x0 address_lo 0x11300c00 data 28
[ 4.530998] mtk-pcie-gen3 11300000.pcie: msi#0x1d address_hi 0x0 address_lo 0x11300c00 data 29
[ 4.539597] mtk-pcie-gen3 11300000.pcie: msi#0x1e address_hi 0x0 address_lo 0x11300c00 data 30
[ 4.548196] mtk-pcie-gen3 11300000.pcie: msi#0x1f address_hi 0x0 address_lo 0x11300c00 data 31
[ 4.557085] mtk-pcie-gen3 11300000.pcie: msi#0x0 address_hi 0x0 address_lo 0x11300c00 data 0
[ 4.565572] pcieport 0000:00:00.0: PME: Signaling with IRQ 114
[ 4.571499] pcieport 0000:00:00.0: AER: enabled with IRQ 114
[ 4.577193] pcieport 0000:00:00.0: saving config space at offset 0x0 (reading 0x798814c3)
[ 4.585358] pcieport 0000:00:00.0: saving config space at offset 0x4 (reading 0x100406)
[ 4.593360] pcieport 0000:00:00.0: saving config space at offset 0x8 (reading 0x6040001)
[ 4.601440] pcieport 0000:00:00.0: saving config space at offset 0xc (reading 0x10000)
[ 4.609349] pcieport 0000:00:00.0: saving config space at offset 0x10 (reading 0x30400004)
[ 4.617602] pcieport 0000:00:00.0: saving config space at offset 0x14 (reading 0x0)
[ 4.625245] pcieport 0000:00:00.0: saving config space at offset 0x18 (reading 0x10100)
[ 4.633237] pcieport 0000:00:00.0: saving config space at offset 0x1c (reading 0x1f1)
[ 4.641055] pcieport 0000:00:00.0: saving config space at offset 0x20 (reading 0xfff0)
[ 4.648960] pcieport 0000:00:00.0: saving config space at offset 0x24 (reading 0x30313021)
[ 4.657212] pcieport 0000:00:00.0: saving config space at offset 0x28 (reading 0x0)
[ 4.664853] pcieport 0000:00:00.0: saving config space at offset 0x2c (reading 0x0)
[ 4.672497] pcieport 0000:00:00.0: saving config space at offset 0x30 (reading 0x0)
[ 4.680142] pcieport 0000:00:00.0: saving config space at offset 0x34 (reading 0x80)
[ 4.687875] pcieport 0000:00:00.0: saving config space at offset 0x38 (reading 0x0)
[ 4.695518] pcieport 0000:00:00.0: saving config space at offset 0x3c (reading 0x20171)
[ 4.703804] mtk-pcie-gen3 11310000.pcie: host bridge /soc/pcie@11310000 ranges:
[ 4.711112] mtk-pcie-gen3 11310000.pcie: Parsing ranges property...
[ 4.717379] mtk-pcie-gen3 11310000.pcie: IO 0x0038000000..0x00381fffff -> 0x0038000000
[ 4.725809] mtk-pcie-gen3 11310000.pcie: MEM 0x0038200000..0x003fffffff -> 0x0038200000
[ 5.067207] mtk-pcie-gen3 11310000.pcie: PCIe link down, current LTSSM state: detect.quiet (0x1)
[ 5.075990] mtk-pcie-gen3: probe of 11310000.pcie failed with error -110
so, as you can see here, 2 devices (the one @ nvme slot and at pci slot 2) are detected, but I’m missing the one at pci slot 1. I assume this is due to fdt overlays being applied ignoring the link state of 2nd pci slot, but how do I force it?
EDIT: tried with a 2nd card, no result either also tried by removing the wifi FDT overlay, but it didn’t change anything, so I assume the pcie link status detection is wrong …
EDIT: closing topic, seems unfixable hardware issue of bpi boards not providing electrical requirements for many intel/atheros chips. Ordered a mt7916. We’ll see how it turns out