Basic questions about GPIOs & device trees

mhc · April 8, 2019, 8:34pm

Hi all, First place, sorry for my basic question.

I’m trying to test some GPIO (2 inputs + 4 outputs) in my BananaPi M2 - Ultra. I’m running an Ubuntu 16.04.6 LTS Xenial, in a terminal connected to Debug TTL UART (no graphical server at all).

My problem is that I can’t find how GPIO are addressed in files sun8i-r40.dtsi & sun8i-r40-bananapi-m2-ultra.dts (if I´m not wrong these files are the former of my compiled device tree sun8i-r40-bananapi-m2-ultra.dtb?)

Please, I would appreciate if someone could guide me in the right direction.

Here are the files.

sun8i-r40.dtsi

/*

Copyright 2017 Chen-Yu Tsai [email protected]
Copyright 2017 Icenowy Zheng [email protected]
This file is dual-licensed: you can use it either under the terms
of the GPL or the X11 license, at your option. Note that this dual
licensing only applies to this file, and not this project as a
whole.
a) This file is free software; you can redistribute it and/or

modify it under the terms of the GNU General Public License as

published by the Free Software Foundation; either version 2 of the

License, or (at your option) any later version.

This file is distributed in the hope that it will be useful,

but WITHOUT ANY WARRANTY; without even the implied warranty of

MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

GNU General Public License for more details.

Or, alternatively,
b) Permission is hereby granted, free of charge, to any person

obtaining a copy of this software and associated documentation

files (the "Software"), to deal in the Software without

restriction, including without limitation the rights to use,

copy, modify, merge, publish, distribute, sublicense, and/or

sell copies of the Software, and to permit persons to whom the

Software is furnished to do so, subject to the following

```
conditions:
```

The above copyright notice and this permission notice shall be

included in all copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,

EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES

OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND

NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT

HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,

WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

```
OTHER DEALINGS IN THE SOFTWARE.
```

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/clock/sun8i-r40-ccu.h>

#include <dt-bindings/reset/sun8i-r40-ccu.h>

/ { #address-cells = <1>; #size-cells = <1>; interrupt-parent = <&gic>;

clocks {
	#address-cells = <1>;
	#size-cells = <1>;
	ranges;

	osc24M: osc24M {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <24000000>;
		clock-output-names = "osc24M";
	};

	osc32k: osc32k {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <32768>;
		clock-output-names = "osc32k";
	};
};

cpus {
	#address-cells = <1>;
	#size-cells = <0>;

	cpu@0 {
		compatible = "arm,cortex-a7";
		device_type = "cpu";
		reg = <0>;
	};

	cpu@1 {
		compatible = "arm,cortex-a7";
		device_type = "cpu";
		reg = <1>;
	};

	cpu@2 {
		compatible = "arm,cortex-a7";
		device_type = "cpu";
		reg = <2>;
	};

	cpu@3 {
		compatible = "arm,cortex-a7";
		device_type = "cpu";
		reg = <3>;
	};
};

soc {
	compatible = "simple-bus";
	#address-cells = <1>;
	#size-cells = <1>;
	ranges;

	nmi_intc: interrupt-controller@1c00030 {
		compatible = "allwinner,sun7i-a20-sc-nmi";
		interrupt-controller;
		#interrupt-cells = <2>;
		reg = <0x01c00030 0x0c>;
		interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
	};

	mmc0: mmc@1c0f000 {
		compatible = "allwinner,sun8i-r40-mmc",
			     "allwinner,sun50i-a64-mmc";
		reg = <0x01c0f000 0x1000>;
		clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
		clock-names = "ahb", "mmc";
		resets = <&ccu RST_BUS_MMC0>;
		reset-names = "ahb";
		pinctrl-0 = <&mmc0_pins>;
		pinctrl-names = "default";
		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
	};

	mmc1: mmc@1c10000 {
		compatible = "allwinner,sun8i-r40-mmc",
			     "allwinner,sun50i-a64-mmc";
		reg = <0x01c10000 0x1000>;
		clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
		clock-names = "ahb", "mmc";
		resets = <&ccu RST_BUS_MMC1>;
		reset-names = "ahb";
		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
	};

	mmc2: mmc@1c11000 {
		compatible = "allwinner,sun8i-r40-emmc",
			     "allwinner,sun50i-a64-emmc";
		reg = <0x01c11000 0x1000>;
		clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
		clock-names = "ahb", "mmc";
		resets = <&ccu RST_BUS_MMC2>;
		reset-names = "ahb";
		pinctrl-0 = <&mmc2_pins>;
		pinctrl-names = "default";
		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
	};

	mmc3: mmc@1c12000 {
		compatible = "allwinner,sun8i-r40-mmc",
			     "allwinner,sun50i-a64-mmc";
		reg = <0x01c12000 0x1000>;
		clocks = <&ccu CLK_BUS_MMC3>, <&ccu CLK_MMC3>;
		clock-names = "ahb", "mmc";
		resets = <&ccu RST_BUS_MMC3>;
		reset-names = "ahb";
		interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
	};

	usbphy: phy@1c13400 {
		compatible = "allwinner,sun8i-r40-usb-phy";
		reg = <0x01c13400 0x14>,
		      <0x01c14800 0x4>,
		      <0x01c19800 0x4>,
		      <0x01c1c800 0x4>;
		reg-names = "phy_ctrl",
			    "pmu0",
			    "pmu1",
			    "pmu2";
		clocks = <&ccu CLK_USB_PHY0>,
			 <&ccu CLK_USB_PHY1>,
			 <&ccu CLK_USB_PHY2>;
		clock-names = "usb0_phy",
			      "usb1_phy",
			      "usb2_phy";
		resets = <&ccu RST_USB_PHY0>,
			 <&ccu RST_USB_PHY1>,
			 <&ccu RST_USB_PHY2>;
		reset-names = "usb0_reset",
			      "usb1_reset",
			      "usb2_reset";
		status = "disabled";
		#phy-cells = <1>;
	};

	ehci1: usb@1c19000 {
		compatible = "allwinner,sun8i-r40-ehci", "generic-ehci";
		reg = <0x01c19000 0x100>;
		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&ccu CLK_BUS_EHCI1>;
		resets = <&ccu RST_BUS_EHCI1>;
		phys = <&usbphy 1>;
		phy-names = "usb";
		status = "disabled";
	};

	ohci1: usb@1c19400 {
		compatible = "allwinner,sun8i-r40-ohci", "generic-ohci";
		reg = <0x01c19400 0x100>;
		interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&ccu CLK_BUS_OHCI1>,
			 <&ccu CLK_USB_OHCI1>;
		resets = <&ccu RST_BUS_OHCI1>;
		phys = <&usbphy 1>;
		phy-names = "usb";
		status = "disabled";
	};

	ehci2: usb@1c1c000 {
		compatible = "allwinner,sun8i-r40-ehci", "generic-ehci";
		reg = <0x01c1c000 0x100>;
		interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&ccu CLK_BUS_EHCI2>;
		resets = <&ccu RST_BUS_EHCI2>;
		phys = <&usbphy 2>;
		phy-names = "usb";
		status = "disabled";
	};

	ohci2: usb@1c1c400 {
		compatible = "allwinner,sun8i-r40-ohci", "generic-ohci";
		reg = <0x01c1c400 0x100>;
		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&ccu CLK_BUS_OHCI2>,
			 <&ccu CLK_USB_OHCI2>;
		resets = <&ccu RST_BUS_OHCI2>;
		phys = <&usbphy 2>;
		phy-names = "usb";
		status = "disabled";
	};

	ccu: clock@1c20000 {
		compatible = "allwinner,sun8i-r40-ccu";
		reg = <0x01c20000 0x400>;
		clocks = <&osc24M>, <&osc32k>;
		clock-names = "hosc", "losc";
		#clock-cells = <1>;
		#reset-cells = <1>;
	};

	pio: pinctrl@1c20800 {
		compatible = "allwinner,sun8i-r40-pinctrl";
		reg = <0x01c20800 0x400>;
		interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
		clock-names = "apb", "hosc", "losc";
		gpio-controller;
		interrupt-controller;
		#interrupt-cells = <3>;
		#gpio-cells = <3>;

		gmac_rgmii_pins: gmac-rgmii-pins {
			pins = "PA0", "PA1", "PA2", "PA3",
			       "PA4", "PA5", "PA6", "PA7",
			       "PA8", "PA10", "PA11", "PA12",
			       "PA13", "PA15", "PA16";
			function = "gmac";
			/*
			 * data lines in RGMII mode use DDR mode
			 * and need a higher signal drive strength
			 */
			drive-strength = <40>;
		};

		i2c0_pins: i2c0-pins {
			pins = "PB0", "PB1";
			function = "i2c0";
		};

		mmc0_pins: mmc0-pins {
			pins = "PF0", "PF1", "PF2",
			       "PF3", "PF4", "PF5";
			function = "mmc0";
			drive-strength = <30>;
			bias-pull-up;
		};

		mmc1_pg_pins: mmc1-pg-pins {
			pins = "PG0", "PG1", "PG2",
			       "PG3", "PG4", "PG5";
			function = "mmc1";
			drive-strength = <30>;
			bias-pull-up;
		};

		mmc2_pins: mmc2-pins {
			pins = "PC5", "PC6", "PC7", "PC8", "PC9",
			       "PC10", "PC11", "PC12", "PC13", "PC14",
			       "PC15", "PC24";
			function = "mmc2";
			drive-strength = <30>;
			bias-pull-up;
		};

		uart0_pb_pins: uart0-pb-pins {
			pins = "PB22", "PB23";
			function = "uart0";
		};
	};

	wdt: watchdog@1c20c90 {
		compatible = "allwinner,sun4i-a10-wdt";
		reg = <0x01c20c90 0x10>;
	};

	uart0: serial@1c28000 {
		compatible = "snps,dw-apb-uart";
		reg = <0x01c28000 0x400>;
		interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
		clocks = <&ccu CLK_BUS_UART0>;
		resets = <&ccu RST_BUS_UART0>;
		status = "disabled";
	};

	uart1: serial@1c28400 {
		compatible = "snps,dw-apb-uart";
		reg = <0x01c28400 0x400>;
		interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
		clocks = <&ccu CLK_BUS_UART1>;
		resets = <&ccu RST_BUS_UART1>;
		status = "disabled";
	};

	uart2: serial@1c28800 {
		compatible = "snps,dw-apb-uart";
		reg = <0x01c28800 0x400>;
		interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
		clocks = <&ccu CLK_BUS_UART2>;
		resets = <&ccu RST_BUS_UART2>;
		status = "disabled";
	};

	uart3: serial@1c28c00 {
		compatible = "snps,dw-apb-uart";
		reg = <0x01c28c00 0x400>;
		interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
		clocks = <&ccu CLK_BUS_UART3>;
		resets = <&ccu RST_BUS_UART3>;
		status = "disabled";
	};

	uart4: serial@1c29000 {
		compatible = "snps,dw-apb-uart";
		reg = <0x01c29000 0x400>;
		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
		clocks = <&ccu CLK_BUS_UART4>;
		resets = <&ccu RST_BUS_UART4>;
		status = "disabled";
	};

	uart5: serial@1c29400 {
		compatible = "snps,dw-apb-uart";
		reg = <0x01c29400 0x400>;
		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
		clocks = <&ccu CLK_BUS_UART5>;
		resets = <&ccu RST_BUS_UART5>;
		status = "disabled";
	};

	uart6: serial@1c29800 {
		compatible = "snps,dw-apb-uart";
		reg = <0x01c29800 0x400>;
		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
		clocks = <&ccu CLK_BUS_UART6>;
		resets = <&ccu RST_BUS_UART6>;
		status = "disabled";
	};

	uart7: serial@1c29c00 {
		compatible = "snps,dw-apb-uart";
		reg = <0x01c29c00 0x400>;
		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
		clocks = <&ccu CLK_BUS_UART7>;
		resets = <&ccu RST_BUS_UART7>;
		status = "disabled";
	};

	i2c0: i2c@1c2ac00 {
		compatible = "allwinner,sun6i-a31-i2c";
		reg = <0x01c2ac00 0x400>;
		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&ccu CLK_BUS_I2C0>;
		resets = <&ccu RST_BUS_I2C0>;
		pinctrl-0 = <&i2c0_pins>;
		pinctrl-names = "default";
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
	};

	i2c1: i2c@1c2b000 {
		compatible = "allwinner,sun6i-a31-i2c";
		reg = <0x01c2b000 0x400>;
		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&ccu CLK_BUS_I2C1>;
		resets = <&ccu RST_BUS_I2C1>;
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
	};

	i2c2: i2c@1c2b400 {
		compatible = "allwinner,sun6i-a31-i2c";
		reg = <0x01c2b400 0x400>;
		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&ccu CLK_BUS_I2C2>;
		resets = <&ccu RST_BUS_I2C2>;
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
	};

	i2c3: i2c@1c2b800 {
		compatible = "allwinner,sun6i-a31-i2c";
		reg = <0x01c2b800 0x400>;
		interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&ccu CLK_BUS_I2C3>;
		resets = <&ccu RST_BUS_I2C3>;
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
	};

	i2c4: i2c@1c2c000 {
		compatible = "allwinner,sun6i-a31-i2c";
		reg = <0x01c2c000 0x400>;
		interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&ccu CLK_BUS_I2C4>;
		resets = <&ccu RST_BUS_I2C4>;
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
	};

	gmac: ethernet@1c50000 {
		compatible = "allwinner,sun8i-r40-gmac";
		syscon = <&ccu>;
		reg = <0x01c50000 0x10000>;
		interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "macirq";
		resets = <&ccu RST_BUS_GMAC>;
		reset-names = "stmmaceth";
		clocks = <&ccu CLK_BUS_GMAC>;
		clock-names = "stmmaceth";
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";

		gmac_mdio: mdio {
			compatible = "snps,dwmac-mdio";
			#address-cells = <1>;
			#size-cells = <0>;
		};
	};

	gic: interrupt-controller@1c81000 {
		compatible = "arm,gic-400";
		reg = <0x01c81000 0x1000>,
		      <0x01c82000 0x1000>,
		      <0x01c84000 0x2000>,
		      <0x01c86000 0x2000>;
		interrupt-controller;
		#interrupt-cells = <3>;
		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
	};
};

timer {
	compatible = "arm,armv7-timer";
	interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
		     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
		     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
		     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};

};

sun8i-r40-bananapi-m2-ultra.dts

/*

Copyright (C) 2017 Chen-Yu Tsai [email protected]
Copyright (C) 2017 Icenowy Zheng [email protected]
This file is dual-licensed: you can use it either under the terms
of the GPL or the X11 license, at your option. Note that this dual
licensing only applies to this file, and not this project as a
whole.
a) This file is free software; you can redistribute it and/or

modify it under the terms of the GNU General Public License as

published by the Free Software Foundation; either version 2 of the

License, or (at your option) any later version.

This file is distributed in the hope that it will be useful,

but WITHOUT ANY WARRANTY; without even the implied warranty of

MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

GNU General Public License for more details.

Or, alternatively,
b) Permission is hereby granted, free of charge, to any person

obtaining a copy of this software and associated documentation

files (the "Software"), to deal in the Software without

restriction, including without limitation the rights to use,

copy, modify, merge, publish, distribute, sublicense, and/or

sell copies of the Software, and to permit persons to whom the

Software is furnished to do so, subject to the following

```
conditions:
```

The above copyright notice and this permission notice shall be

included in all copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,

EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES

OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND

NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT

HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,

WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

```
OTHER DEALINGS IN THE SOFTWARE.
```

*/

/dts-v1/; #include “sun8i-r40.dtsi”

#include <dt-bindings/gpio/gpio.h>

/ { model = “Banana Pi BPI-M2-Ultra”; compatible = “sinovoip,bpi-m2-ultra”, “allwinner,sun8i-r40”;

aliases {
	ethernet0 = &gmac;
	serial0 = &uart0;
};

chosen {
	stdout-path = "serial0:115200n8";
};

leds {
	compatible = "gpio-leds";

	pwr-led {
		label = "bananapi:red:pwr";
		gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>;
		default-state = "on";
	};

	user-led-green {
		label = "bananapi:green:user";
		gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>;
	};

	user-led-blue {
		label = "bananapi:blue:user";
		gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>;
	};
};

reg_vcc5v0: vcc5v0 {
	compatible = "regulator-fixed";
	regulator-name = "vcc5v0";
	regulator-min-microvolt = <5000000>;
	regulator-max-microvolt = <5000000>;
	gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>; /* PH23 */
	enable-active-high;
};

wifi_pwrseq: wifi_pwrseq {
	compatible = "mmc-pwrseq-simple";
	reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 WIFI_EN */
};

};

&ehci1 { status = “okay”; };

&ehci2 { status = “okay”; };

&gmac { pinctrl-names = “default”; pinctrl-0 = <&gmac_rgmii_pins>; phy-handle = <&phy1>; phy-mode = “rgmii”; phy-supply = <&reg_dc1sw>; status = “okay”; };

&gmac_mdio { phy1: ethernet-phy@1 { compatible = “ethernet-phy-ieee802.3-c22”; reg = <1>; }; };

&i2c0 { status = “okay”;

axp22x: pmic@34 {
	compatible = "x-powers,axp221";
	reg = <0x34>;
	interrupt-parent = <&nmi_intc>;
	interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
};

};

#include “axp22x.dtsi”

&mmc0 { vmmc-supply = <&reg_dcdc1>; bus-width = <4>; cd-gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>; /* PH13 */ cd-inverted; status = “okay”; };

&mmc1 { pinctrl-names = “default”; pinctrl-0 = <&mmc1_pg_pins>; vmmc-supply = <&reg_dldo2>; vqmmc-supply = <&reg_dldo1>; mmc-pwrseq = <&wifi_pwrseq>; bus-width = <4>; non-removable; status = “okay”; };

&mmc2 { vmmc-supply = <&reg_dcdc1>; vqmmc-supply = <&reg_dcdc1>; bus-width = <8>; non-removable; status = “okay”; };

&ohci1 { status = “okay”; };

&ohci2 { status = “okay”; };

&reg_aldo2 { regulator-always-on; regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2500000>; regulator-name = “vcc-pa”; };

&reg_aldo3 { regulator-always-on; regulator-min-microvolt = <2700000>; regulator-max-microvolt = <3300000>; regulator-name = “avcc”; };

&reg_dc1sw { regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; regulator-name = “vcc-gmac-phy”; };

&reg_dcdc1 { regulator-always-on; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; regulator-name = “vcc-3v0”; };

&reg_dcdc2 { regulator-always-on; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1300000>; regulator-name = “vdd-cpu”; };

&reg_dcdc3 { regulator-always-on; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1300000>; regulator-name = “vdd-sys”; };

&reg_dcdc5 { regulator-always-on; regulator-min-microvolt = <1500000>; regulator-max-microvolt = <1500000>; regulator-name = “vcc-dram”; };

&reg_dldo1 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-name = “vcc-wifi-io”; };

&reg_dldo2 { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-name = “vcc-wifi”; };

&uart0 { pinctrl-names = “default”; pinctrl-0 = <&uart0_pb_pins>; status = “okay”; };

&usbphy { usb1_vbus-supply = <&reg_vcc5v0>; usb2_vbus-supply = <&reg_vcc5v0>; status = “okay”; };

Many thanks in advance!

mhc

mutluit · June 4, 2019, 3:44pm

Hi, FYI: the .dtb’s are complied (ie. binary) versions of the underlying .dts source files. The .dtb’s will be generated when building the kernel, and passing “dtbs”, like in this make call:

make -j3 LOADADDR=0x40008000 uImage modules dtbs

They are all in the linux kernel source tree under linux/arch/arm/boot/dts/ . The .dtsi files are include files, ie. part of the .dts files. They can also be created temporarily during the build process.

Here’s a popular booklet about the device tree:

mhc · June 18, 2019, 5:28pm

mutluit, many thanks for your answer. I’ll check it.

Regards

mhc