Banana Pi BPI-R4 Wifi 7 router board with MediaTek MT7988A (Filogic 880),4G RAM and 8G eMMC

You will have official support in OpenWrt’s snapshots (and maybe even a backport to 23.05, but I can’t promise) within the next week. Other then Windows which allows hardware companies to develop drivers behind closed door and have them work with the most recent version of the OS is something nearly impossible to achieve in the Free Open Source Software world.

OpenWrt requires changes to be maintainable, and for hardware drivers that means they need to be pushed upstream to the Linux kernel (or at least be in a shape that would allow to send them upstream and start the discussion), as otherwise it will be a lot of work to keep adapting the drivers for newer kernel versions in future (which is what you can see now when trying to build anything newer than Linux 5.4…).

The patchset on top of OpenWrt 21.02 MediaTek provides for the boards is useful as a reference, to build commercial firmware or validate hardware functionality, however, it is certainly not in a shape to be sent upstream as-is – I’ve been working on extracting the necessary changes, cleaning them up and sending them upstream together with others who were provided early versions of the BPI-R4.

MediaTek and BPi have made quite some effort to get support for this new SoC landed in Linux ahead of time (which is better than what everyone else in the market is doing), however, 6 months are still not a a terrible lot of time when it comes to discuss complex driver changes with busy upstream maintainers, hence this process is still ongoing.

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that would be great, then i stop my approach now with self compiling. Maybe it would make sense to write that information somewhere, because i thought its now for openwrt 21.x and stays there. If i would have knew that there is some WIP for main/master openwrt, i would never touched anything :slight_smile: Thanks for your effort! And yes, any effort for mainline is very very appreciated. Unfortunately, my experience with MTK is bad bad bad when it comes to mainline/opensource. So i am looking forward for your releases, thanks!

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I’m confused, are the cages SFP or SFP+, I thought the two were not interoperable?

Will they support these GPON SFP transceivers:

If it can run those optics, I would rather buy an R4 instead of an R3 for Gigabit WAN with SQM. When might enclosures for the R4 start to be available?

R4 is SFP+ and downwards compatible to SFP due to pcs switch (mac can do sgmii to support the lower speeds).

Compatibility should be same as R3 + sfp+

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Very interesting board, how stable is the firmware? Is the board finalized in terms of hardware? Many questions, little answers so far.

Can it handle 10gbit with SFP+ transceiver bidirectional?

it supports 2.5Gbps transceivers ??

Yes it does. SFP(+) modules supporting either Cisco SGMII, 1000Base-X, 2500Base-X, 5GBase-R, 10GBase-R or USXGMII will work fine.

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What about 10G BASE-T modules???

10GBase-T modules usually use either 10GBase-R (ie. pretending to be a fiber module) or USXGMII (in case the built-in PHY can be discovered by Linux). I’ve tried a bunch of 10G RJ-45 modules and they all worked fine (most with either Marvell or AQR PHY discovered and in USXGMII mode, one 6Com module I got here has broken EEPROM but works in 10GBase-R mode).

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Thanks, that makes it clear and wow, I have some Qs:

  1. Can serial DCD be exported to a GPIO pin from one of the UARTs?
  2. How much of a ballpark performance boost might SQM see on the A73 over the A53?
  3. Will it support a 10G SFP in both or max is 10G + 2.5G concurrently? What is US下GMII?
  4. I won’t be using wifi on this, are the bottom two mpcie slots usable for standard mpcie / usb modules?
  1. Sfp slot are connected using i2c (for data communication with sfp eeprom to detect its type phy etc) and some fixed gpio to map states in linux like rx-los moddef0 etc. Afaik it is not possible to expose additional gpio from sfp.

  2. not sure about this…you can look for public benchmarks

  3. it should support 2x10G+1x4g (switch) simultanously if rss+lro implemented correctly and enabled. Usxgmii is a hw mode / transmission protocol used to connect the 2 SFP-cages to SoC

  4. basicly it should work,but take care of sw4 which switches 12v to some pins of pcie connector (may brick some cards). Make sure it is switched off before powering the board with other cards inserted

Is version 1.1 the latest version of this assembly? The Amazon US seller says that the revision there is 1.1 Though I should still wait to see Quectel RM521F-GL 5G modem support, as that would make this the perfect assembly for me.

Yes that is also my biggest concern, is it the final version are there more? Very strange.

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Right, it means this board is far from finished, at least in software side.

I apologize for being unclear, I did not mean off the SFP pins, rather one of the UARTs from the 26 pin GPIO header on the SoC, I only see RX/TX CTS/RTS 3.3V/GND and I need DCD.

The few reviews that are more of press releases don’t shed much light in terms of CPU uptick. I would really like to see some SQM results, post which I’d buy this in a jiffy to enable to get rid of ISP supplied GPON optics.

Thank you for clearing all that up, I appreciate it!

Anyone tested the nat or wireguard performance? Or nvme over samba?

Hello everyone! Anyone have 3d model of motherboard of R4? I want to make 3d model of case. Or maybe someone have 3d model of case?

Im sorry for my ignorance but i cannot read schematics very well.

Are any of ports going to be “dedicated” (i.e. not sharing bandwidth with other ports)

Thanks in advance

Other than previous BPi router products the R4 doesn’t overbook Ethernet bandwidth: 4x 1GE via built-in switch, connected to SoC with 4 Gbit/s 2x 10G SFP+, each connected to the SoC via it’s own SerDes lane

In terms of USB, there is a on-board USB 3 hub, so USB bandwidth is shared.

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