sinovoip
(bpi team)
1
SpacemiT K1 8 core RISC-V chip (Banana Pi BPI-F3) RISC-V IME set Specification public on github
RISC-V IME set Specification
Introduction
This is a matrix extension proposal under the RISC-V IME extension standard. It has the following features.
- Low lost
- Reuse the vector registers and the related CSRs.
- Compatibility
- Support VLEN of vector registers from 128 bit to 4096 bit
- Almost binary portability
- Rich data types
- Integer int4/int8/int16
- float fp4/fp8/fp16/bf16
#SpacemiT #riscv #sbc #bananapi #linux #openwrt
cwt
(Chaiwat Suttipongsakul)
2
Do we have a RISC-V native compiler that support IME or gcc/clang patch that I can apply and rebuild my compiler on any other Linux distro?
I already found the cross compiler and native one that came along with Bianbu Linux, but I also want to port or rebuild it for Arch.