Hi everyone!
I’ve connected a JTAG to my board and have troubles with successful connection using the openocd.
my config is based on https://review.openocd.org/c/openocd/+/6053/1/tcl/target/mediatek/mt7629.cfg:
adapter speed 1000
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME mt7623
}
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x4ba00477
}
set _COREBASE {0x80810000} ## brute force?
set _CORES 1 # set to 1 for testing
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -enable
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
set _TARGETNAME $_CHIPNAME.cpu
set _smp_command ""
for { set _core 0 } { $_core < $_CORES } { incr _core 1 } {
set _command "target create ${_TARGETNAME}$_core cortex_a \
-dap $_CHIPNAME.dap -coreid $_core \
-dbgbase [lindex $_COREBASE $_core]"
if { $_core != 0 } {
set _command "$_command -defer-examine"
set _smp_command "$_smp_command ${_TARGETNAME}$_core"
} else {
set _smp_command "target smp ${_TARGETNAME}$_core"
}
eval $_command
}
eval $_smp_command
targets ${_TARGETNAME}0
my output:
Open On-Chip Debugger 0.11.0
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'.
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : J-Link V9 compiled May 7 2021 16:26:12
Info : Hardware version: 9.60
Info : VTarget = 3.301 V
Info : clock speed 1000 kHz
Info : JTAG tap: mt7623.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd), part: 0xba00, ver: 0x4)
Info : mt7623.cpu0: hardware has 15 breakpoints, 14 watchpoints
Info : starting gdb server for mt7623.cpu0 on 3333
Info : Listening on port 3333 for gdb connections
Info : accepting 'telnet' connection on tcp/4444
Info : JTAG tap: mt7623.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd), part: 0xba00, ver: 0x4)
Error: mt7623.cpu0: how to reset?
and
Info : Halt timed out, wake up GDB.
Error: timed out while waiting for target halted
Error: timeout waiting for DSCR bit change
Error: Error waiting for InstrCompl=1
Error: Error waiting for cortex_a_exec_opcode
Error: cortex_a_mmu: target not halted
Warn : target not halted
Error: timeout waiting for DSCR bit change
Error: Error waiting for InstrCompl=1
Error: Error waiting for cortex_a_exec_opcode
looks like it has a wrong _COREBASE (mt7629’s doesn’t work)
@sinovoip is it possible to publish the correct one? (for all cores)
Thank You!
UPD:
Ok, some progress, now I have:
Open On-Chip Debugger 0.11.0
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'.
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : J-Link V9 compiled May 7 2021 16:26:12
Info : Hardware version: 9.60
Info : VTarget = 3.296 V
Info : clock speed 1000 kHz
Info : JTAG tap: mt7629.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd), part: 0xba00, ver: 0x4)
Warn : Debug base address for target mt7629.cpu0 has bit 31 set to 0. Access to debug registers will likely fail!
Please fix the target configuration.
Error: target->coreid 0 powered down!
Warn : target mt7629.cpu0 examination failed
Info : starting gdb server for mt7629.cpu0 on 3333
Info : Listening on port 3333 for gdb connections
As I got bit 31 set to 0 means - No debug entry present.
Is it possible to enable it? may it be enabled on some events? Anyone? Thx!