How to read NAND on uboot?

Hi. I want to read NAND memory from the uboot prompt.

In the past, when working on other platforms, I used the nand read command to read data from SDRAM, but it doesn’t work well on R64.

I ran the command below.

BPI-R64> nand info

Device 0: nand0, sector size 1806848 KiB Page size 7 b OOB size 64 b Erase size 1850212352 b BPI-R64> nand read 0x4007FF28 0x00 0x1000

NAND read: device 0 offset 0x0, size 0x1000 undefined instructions pc: [<00200004>] lr: [<7ef43c08>] sp:7cf1bc90 ip:00000000 fp:00000000 r10: 00000000 r9: 7cf1bf40 r8: 00000000 r7:7cf1bce0 r6: 00000000 r5:7ef7a090 r4:00000000 r3:00000000 r2:00000020 r1:00000000 r0:00000000 Flags: nZcv IRQs off FIQs off Mode SVC_32 Resetting CPU…

Please advise to me. Thank you.

It would help if you can tell where your U-Boot version comes from and which version it is.

Use code block when you paste some log…

```
Some log output
```
Thanks your advice.
log is below
====================================
=~=~=~=~=~=~=~=~=~=~=~= PuTTY log 2025.11.13 08:53:38 =~=~=~=~=~=~=~=~=~=~=~=
 

F0: 102B 0000

F6: 3800 00A0

F3: 0000 0000

V0: 0000 0000 [0001]

00: 0000 0000

BP: 0000 0041 [0000]

G0: 0190 0000

T0: 0000 032E [000F]

Jump to BL


UNIVPLL_CON0 = 0xFE000000!!!

mt_pll_init: Set pll frequency for 25M crystal

[PMIC_WRAP]wrap_init pass,the return value=0.

[pmic_init] Preloader Start..................

[pmic_init] MT6380 CHIP Code, reg_val = 0, 1:E2  0:E3

[pmic_init] Done...................

Chip part number:7622A

MT7622 Version: 1.2.7, (iPA) 

SSC OFF

mt_pll_post_init: mt_get_cpu_freq = 1350000Khz

mt_pll_post_init: mt_get_mem_freq = 1600000Khz

mt_pll_post_init: mt_get_bus_freq = 1119920Khz

[PLFM] Init I2C: OK(0)



[BLDR] Build Time: 20190905-150300

==== Dump RGU Reg ========

RGU MODE:     4D

RGU LENGTH:   FFE0

RGU STA:      0

RGU INTERVAL: FFF

RGU SWSYSRST: 8000

==== Dump RGU Reg End ====

RGU: g_rgu_satus:0

 mtk_wdt_mode_config  mode value=10, tmp:22000010

PL P ON

WDT does not trigger reboot

WDT NONRST=0x20000000

WDT IRQ_EN=0x340003

RGU mtk_wdt_init:MTK_WDT_DEBUG_CTL(590200F3)

[EMI] MDL number = 2

[EMI] DRAMC calibration start



[EMI] DRAMC calibration end



[EMI]rank0 size: 0x40000000

[MEM] complex R/W mem test pass

RAM_CONSOLE wdt status (0x0)=0x0

[mmc_init]: msdc0 start mmc_init_host() in PL...

[msdc_init]: msdc0 Host controller intialization start 

[SD0] Pins mode(1), none(0), down(1), up(2), keep(3)

[SD0] Pins mode(2), none(0), down(1), up(2), keep(3)

[info][msdc_set_startbit 1127] read data start bit at rising edge

[info][msdc_config_clksrc] input clock is 400000kHz

[SD0] Bus Width: 1

[info][msdc_config_clksrc] input clock is 400000kHz

[info][msdc_set_startbit 1127] read data start bit at rising edge

[SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(0) DDR(0) DIV(385) DS(0) RS(0)

[msdc_init]: msdc0 Host controller intialization done

[mmc_init]: msdc0 start mmc_init_card() in PL...

[mmc_init_card]: start

[info][msdc_config_clksrc] input clock is 400000kHz

[info][msdc_set_startbit 1127] read data start bit at rising edge

[SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(0) DDR(0) DIV(385) DS(0) RS(0)

[SD0] Bus Width: 8

[SD0] Switch to High-Speed mode!

[info][msdc_config_clksrc] input clock is 400000kHz

[info][msdc_set_startbit 1127] read data start bit at rising edge

[SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(2) DDR(1) DIV(192) DS(0) RS(0)

[SD0] Bus Width: 8

[SD0] Size: 7456 MB, Max.Speed: 52000 kHz, blklen(512), nblks(15269888), ro(0)

[mmc_init_mem_card 3140][SD0] Initialized, eMMC50

before host->cur_bus_clk(259740)

[info][msdc_config_clksrc] input clock is 400000kHz

[info][msdc_set_startbit 1127] read data start bit at rising edge

[SD0] SET_CLK(52000kHz): SCLK(50000kHz) MODE(2) DDR(1) DIV(1) DS(0) RS(0)

host->cur_bus_clk(50000000)

[mmc_init_card]: finish successfully

[PLFM] Init Boot Device: OK(0)

[GPT_PL](BPI)Parsing Primary GPT now...

[GPT_PL][0]name=tee1, part_id=8, start_sect=0x400, nr_sects=0x200

[GPT_PL][1]name=lk, part_id=8, start_sect=0x600, nr_sects=0x400

[GPT_PL][2]name=nvram, part_id=8, start_sect=0xA00, nr_sects=0x400

[GPT_PL][3]name=rf, part_id=8, start_sect=0xE00, nr_sects=0x200

[GPT_PL][4]name=boot, part_id=8, start_sect=0x1000, nr_sects=0xA000

[GPT_PL][5]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][6]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][7]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][8]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][9]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][10]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][11]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][12]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][13]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][14]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][15]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][16]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][17]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][18]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][19]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][20]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][21]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][22]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][23]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][24]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][25]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][26]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][27]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][28]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][29]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][30]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][31]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][32]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][33]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][34]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][35]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][36]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][37]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][38]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][39]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][40]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][41]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][42]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][43]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][44]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][45]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][46]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][47]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][48]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][49]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][50]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][51]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][52]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][53]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][54]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][55]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][56]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][57]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][58]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][59]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][60]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][61]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][62]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][63]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][64]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][65]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][66]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][67]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][68]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][69]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][70]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][71]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][72]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][73]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][74]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][75]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][76]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][77]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][78]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][79]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][80]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][81]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][82]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][83]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][84]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][85]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][86]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][87]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][88]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][89]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][90]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][91]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][92]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][93]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][94]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][95]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][96]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][97]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][98]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][99]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][100]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][101]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][102]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][103]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][104]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][105]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][106]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][107]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][108]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][109]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][110]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][111]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][112]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][113]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][114]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][115]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][116]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][117]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][118]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][119]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][120]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][121]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][122]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][123]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][124]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][125]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][126]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL][127]name=, part_id=8, start_sect=0x0, nr_sects=0x1

[GPT_PL]Success to find valid GPT.



[PART] blksz: 512B

[PART] [0x0000000000080000-0x00000000000BFFFF] "tee1" (512 blocks) 

[PART] [0x00000000000C0000-0x000000000013FFFF] "lk" (1024 blocks) 

[PART] [0x0000000000140000-0x00000000001BFFFF] "nvram" (1024 blocks) 

[PART] [0x00000000001C0000-0x00000000001FFFFF] "rf" (512 blocks) 

[PART] [0x0000000000200000-0x00000000015FFFFF] "boot" (40960 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) 

[PART] [0x00000062CACAE800-0x0000012D938CE7FF] "unknown" (1701077248 blocks) 



Device APC domain init setup:



Domain Setup (0x0)

Domain Setup (0x0)

Device APC domain after setup:

Domain Setup (0x0)

Domain Setup (0x0)

[get_part] part->nr_sects=512, part->info->name=tee1

[get_part] part->nr_sects=1024, part->info->name=lk

[PART] Image with part header

[PART] name : LK

[PART] addr : FFFFFFFFh mode : -1

[PART] size : 364756

[PART] magic: 58881688h



[PART] load "lk" from 0x00000000000C0200 (dev) to 0x41E00000 (mem) [SUCCESS]

[PART] load speed: 11130KB/s, 364756 bytes, 32ms

load lk (ret=0)

[get_part] part->nr_sects=512, part->info->name=tee1

[PART] Image with part header

[PART] name : atf

[PART] addr : FFFFFFFFh mode : -1

[PART] size : 62032

[PART] magic: 58881688h



[PART] load "tee1" from 0x0000000000080200 (dev) to 0x43000DC0 (mem) [SUCCESS]

[PART] load speed: 6730KB/s, 62032 bytes, 9ms

load tee1 (ret=0)

[BLDR] bldr load tee part ret=0x0, addr=0x43001000

[get_part] part->nr_sects=512, part->info->name=tee1

[get_part] part->nr_sects=1024, part->info->name=lk

[get_part] part->nr_sects=1024, part->info->name=nvram

[get_part] part->nr_sects=512, part->info->name=rf

[get_part] part->nr_sects=40960, part->info->name=boot

[BLDR] part_load_raw_part ret=0x0

[BLDR] part_load_images ret=0x0

[BLDR] Others, jump to ATF



[BLDR] jump to 0x41E00000

[BLDR] <0x41E00000>=0xEA00000F

[BLDR] <0x41E00004>=0xE59FF014



U-Boot  (Sep 05 2019 - 16:57:15)

DRAM:  1008 MiB
WARNING: Caches not enabled
NAND:  Recognize SNAND: ID [ef aa ], Device Name [Winbond 1Gb], Page Size [2048]B Spare Size [64]B Total Size [128]MB
[mtk_snand] probe successfully!
128 MiB
dev_num = 1
***size=4096, offset=1310720, blk_start=2560, blk_cnt=8
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
dev_num = 1
***size=4096, offset=1310720, blk_start=2560, blk_cnt=8
*** Warning - bad CRC, using default environment

Net:   mtk_eth
Uip activated

BPI-R64> nand info


Device 0: nand0, sector size 3801088 KiB
  Page size        14 b
  OOB size         64 b
  Erase size -402653184 b
BPI-R64> nand

nand - NAND sub-system

Usage:
nand info - show available NAND devices
nand device [dev] - show or set current device
nand read - addr off|partition size
nand write - addr off|partition size
    read/write 'size' bytes starting at offset 'off'
    to/from memory address 'addr', skipping bad blocks.
nand read.raw - addr off|partition [count]
nand write.raw - addr off|partition [count]
    Use read.raw/write.raw to avoid ECC and access the flash as-is.
nand erase[.spread] [clean] off size - erase 'size' bytes from offset 'off'
    With '.spread', erase enough for given file size, otherwise,
    'size' includes skipped bad blocks.
nand erase.part [clean] partition - erase entire mtd partition'
nand erase.chip [clean] - erase entire chip'
nand bad - show bad blocks
nand dump[.oob] off - dump page
nand scrub [-y] off size | scrub.part partition | scrub.chip
    really clean NAND erasing bad blocks (UNSAFE)
nand markbad off [...] - mark bad block(s) at offset (UNSAFE)
nand biterr off - make a bit error at offset (UNSAFE)
BPI-R64> nand read ${loadaddr} 0x0 0x1000


NAND read: device 0 offset 0x0, size 0x1000
undefined instruction
pc : [<00200004>]	   lr : [<7ef43c08>]
sp : 7cf1bbb0  ip : 00000000	 fp : 00000000
r10: 00000000  r9 : 7cf1bf40	 r8 : 00000000
r7 : 7cf1bc00  r6 : 00000000	 r5 : 7ef7a090  r4 : 00000000
r3 : 00000000  r2 : 00000020	 r1 : 00000000  r0 : 00000000
Flags: nZcv  IRQs off  FIQs off  Mode SVC_32
Resetting CPU ...

resetting ...
mtk_arch_reset at pre-loader!


F0: 102B 0000

F6: 3800 00A0

F3: 0000 0000

V0: 0000 0000 [0001]

00: 0000 0000

BP: 0000 0041 [0000]

G0: 0190 0000

T0: 0000 0335 [000F]

Jump to BL


UNIVPLL_CON0 = 0xFE000000!!!

mt_pll_init: Set pll frequency for 25M crystal

RAM_CONSOLE preloader last status: 0x0 0x0 0x0 0x0 0x0 0x0 

[PMIC_WRAP]wrap_init pass,the return value=0.

[pmic_init] Preloader Start..................

[pmic_init] MT6380 CHIP Code, reg_val = 0, 1:E2  0:E3

[pmic_init] Done...................

Chip part number:7622A

MT7622 Version: 1.2.7, (iPA) 

SSC OFF

mt_pll_post_init: mt_get_cpu_freq = 1350000Khz

mt_pll_post_init: mt_get_mem_freq = 1600000Khz

mt_pll_post_init: mt_get_bus_freq = 1119920Khz

[PLFM] Init I2C: OK(0)



[BLDR] Build Time: 20190905-150300

==== Dump RGU Reg ========

RGU MODE:     14

RGU LENGTH:   FFE0

RGU STA:      40000000

RGU INTERVAL: FFF

RGU SWSYSRST: 8000

==== Dump RGU Reg End ====

RGU: g_rgu_satus:2

 mtk_wdt_mode_config  mode value=10, tmp:22000010

PL RGU RST: ??

SW reset with bypass power key flag

Find bypass powerkey flag

WDT NONRST=0x20000000

WDT IRQ_EN=0x340003

RGU mtk_wdt_init:MTK_WDT_DEBUG_CTL(590200F3)

[EMI] MDL number = 2

[EMI] DRAMC calibration start



[EMI] DRAMC calibration end



[EMI]rank0 size: 0x40000000

[MEM] complex R/W mem test pass

RAM_CONSOLE wdt status (0x2)=0x2

[mmc_init]: msdc0 start mmc_init_host() in PL...

[msdc_init]: msdc0 Host controller intialization start 

[SD0] Pins mode(1), none(0), down(1), up(2), keep(3)

[SD0] Pins mode(2), none(0), down(1), up(2), keep(3)

[info][msdc_set_startbit 1127] read data start bit at rising edge

[info][msdc_config_clksrc] input clock is 400000kHz

[SD0] Bus Width: 1

[info][msdc_config_clksrc] input clock is 400000kHz

[info][msdc_set_startbit 1127] read data start bit at rising edge

[SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(0) DDR(0) DIV(385) DS(0) RS(0)

[msdc_init]: msdc0 Host controller intialization done

[mmc_init]: msdc0 start mmc_init_card() in PL...

[mmc_init_card]: start

[info][msdc_config_clksrc] input clock is 400000kHz

[info][msdc_set_startbit 1127] read data start bit at rising edge

[SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(0) DDR(0) DIV(385) DS(0) RS(0)

[SD0] Bus Width: 8

[SD0] Switch to High-Speed mode!

[info][msdc_config_clksrc] input clock is 400000kHz

[info][msdc_set_startbit 1127] read data start bit at rising edge

[SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(2) DDR(1) DIV(192) DS(0) RS(0)

[SD0] Bus Width: 8

[SD0] Size: 7456 MB, Max.Speed: 52000 kHz, blklen(512), nblks(15269888), ro(0)

[mmc_init_mem_card 3140][SD0] Initialized, eMMC50

before host->cur_bus_clk(259740)

[info][msdc_config_clksrc] input clock is 400000kHz

[info][msdc_set_startbit 1127] read data start bit at rising edge

[SD0] SET_CLK(52000kHz): SCLK(50000kHz) MODE(2) DDR(1) DIV(1) DS(0) RS(0)

host->cur_bus_clk(50000000)

[mmc_init_card]: finish successfully

[PLFM] Init Boot Device: OK(0)
type or paste code here
````Preformatted text`

I’ve noticed a strange behavior.

When I insert a MicroSD card into the slot and use the “nand info” command, the NAND information is displayed, but if the MicroSD card isn’t present, no information is displayed.

There’s no correlation between the NAND and the MicroSD card, so this behavior suggests a problem with uboot.

However, it appears that uboot is currently stored on nand, but since I have no way to access it, it seems like even if I rebuild uboot, it won’t update.

I don’t know what to do.

It might be, within these 6 years, someone encountered and fixed this bug by now…

Start with updating your system, or replacing the used image entirely.

OK. I will try it. But. How to update uboot to the emmc? Because this time uboot is on the emmc now. But i don’t know how to update uboot to the emmc.

https://openwrt.org/toh/sinovoip/bananapi_bpi-r64_v1.1

Start with a fresh openwrt on sd-card. From there Install the new openwrt on emmc.

Thanks. your reply. But. I’m already done boot from SD and write image to emmc. I’m want to just use “SPI NAND”. So I’m try to find “How to access SPI NAND”. Thank you.

Is ${loadaddr} a valid number?

Try using the mtd command instead.

Hi. ${loadaddr} is valid address.

@poplinux Any luck with that? You should use mtd instead of nand directly…