for mt7615, does this mean that there will be a opensource-driver in mainline/recent kernel version?
=> yes, it is still far away from the target. Share a mt7615-devel repo to you.
i just can ping now , but I have not push the related patches yet.
have you an idea about the gpio-issue? how far is uboot-upstream?
what gpio-issue? uboot-upstream(with ATF) is in my todo list - due to limited time.
You can ping through switch or wifi (pushed patches for first or second)?
Gpio-issue:
after adding CONFIG_GPIO_SYSFS to my Kernel i see /sys/class/gpio, but i cannot export it (i try gpio56=pin3)
root@bpi-iot-ros-ai:~# cat /sys/kernel/debug/pinctrl/10211000.pinctrl-pinctrl_mt7622/gpio-ranges
GPIO ranges handled:
0: pinctrl_mt7622 GPIOS [409 - 511] PINS [0 - 102]
root@bpi-iot-ros-ai:~# GPIO_NO=$((409+56))
root@bpi-iot-ros-ai:~# echo $GPIO_NO
465
root@bpi-iot-ros-ai:~# echo $GPIO_NO > /sys/class/gpio/export
-bash: echo: write error: Invalid argument
BT-issue:
root@bpi-iot-ros-ai:~# ls /lib/firmware/mediatek
mt7622pr2h.bin
root@bpi-iot-ros-ai:~# dmesg | grep hci0
[ 14.819610] Bluetooth: hci0: Execution of wmt command timed out
[ 14.819672] Bluetooth: hci0: Failed to send wmt patch dwnld (-110)
see here for more
also have not get emmc-boot to work…it seems, that problem is preloader (have also set pconf to 0x48 via mmcutils because it was 0x0)…
F0: 102B 0000
F5: 480A 0031
F5: 480A 0031
F3: 4002 0000
F2: 300C 0000
00: 1005 0000
F5: 480A 0031
F5: 480A 0031
F3: 4002 0000
F2: 300C 0000
01: 102A 0001
02: 1005 0000
BP: 0000 00C0 [0001]
T0: 0000 030F [000F]
System halt!
sd-card bootup looks like this:
F0: 102B 0000
F5: 0000 0000
V0: 0000 0000 [0001]
00: 0000 0000
BP: 0000 0041 [0000]
G0: 0190 0000
T0: 0000 040C [000F]
Jump to BL
UNIVPLL_CON0 = 0xFE000000!!!
mt_pll_init: Set pll frequency for 25M crystal
RAM_CONSOLE preloader last status: 0x0 0x0 0x0 0x0 0x0 0x0
[PMIC_WRAP]wrap_init pass,the return value=0.
[pmic_init] Preloader Start..................
[pmic_init] MT6380 CHIP Code, reg_val = 0, 1:E2 0:E3Bluetooth-issue is solved by increased sleep in SCPSYS-driver Banana Pi BPI-R64 open source router with MTK MT7622 64 bit chip design
gpio-issue is solved by disabling i2c1 (which shares pin on gpio-header): Banana Pi BPI-R64 open source router with MTK MT7622 64 bit chip design
which uart is debug-uart? this looks like uart0, but looking on gpio-header (there are uart0+1) suggests uart2 as debug-uart like on r2
in dts uart1 is completely missing…i see uart1 in mt7622.dtsi which is included, but maybe i miss uart1_pins which is defined for the other 2 in dts
uart0_pins: uart0-pins {
mux {
function = "uart";
groups = "uart0_0_tx_rx" ;
};
};
uart2_pins: uart2-pins {
mux {
function = "uart";
groups = "uart2_1_tx_rx" ;
};
};
why is uart2=uart2_1_tx_rx (what does the 1 mean)?
if i look into drivers/pinctrl/mediatek/pinctrl-mt7622.c i see:
PINCTRL_PIN_GROUP("uart0_0_tx_rx", mt7622_uart0_0_tx_rx),
PINCTRL_PIN_GROUP("uart1_0_tx_rx", mt7622_uart1_0_tx_rx),
PINCTRL_PIN_GROUP("uart1_0_rts_cts", mt7622_uart1_0_rts_cts),
PINCTRL_PIN_GROUP("uart1_1_tx_rx", mt7622_uart1_1_tx_rx),
PINCTRL_PIN_GROUP("uart1_1_rts_cts", mt7622_uart1_1_rts_cts),
PINCTRL_PIN_GROUP("uart2_0_tx_rx", mt7622_uart2_0_tx_rx),
PINCTRL_PIN_GROUP("uart2_0_rts_cts", mt7622_uart2_0_rts_cts),
PINCTRL_PIN_GROUP("uart2_1_tx_rx", mt7622_uart2_1_tx_rx),
PINCTRL_PIN_GROUP("uart2_1_rts_cts", mt7622_uart2_1_rts_cts),
PINCTRL_PIN_GROUP("uart2_2_tx_rx", mt7622_uart2_2_tx_rx),
for uart1 i have uart1_0_tx_rx and uart1_1_tx_rx…which one is the right one?
static int mt7622_uart0_0_tx_rx_pins[] = { 6, 7, };//not matching gpio-number (=59,60) => maybe the debug-uart?
...
static int mt7622_uart1_0_tx_rx_pins[] = { 55, 56, };
static int mt7622_uart1_1_tx_rx_pins[] = { 73, 74, };
...
static int mt7622_uart2_1_tx_rx_pins[] = { 51, 52, }; //=gpio-numbers of uart1
no uart1_x_tx_rx does match gpio-numbers of uart0 on gpio-header (uart1 on gpio=uart2 in dts)
If these numbers are the gpios i guess uart1 (uart0 on gpioheader) should use this:
static int mt7622_uart2_2_tx_rx_pins[] = { 59, 60, };
i can confirm that debug-uart is the uart0 from dts…if i disable it i get no console-output after ATF-infos
## Booting kernel from Legacy Image at 44000000 ...
Image Name: Linux Kernel 4.19.0-r64-main
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 8527880 Bytes = 8.1 MiB
Load Address: 40080000
Entry Point: 40080000
Verifying Checksum ... OK
## Flattened Device Tree blob at 47000000
Booting using the fdt blob at 0x47000000
Loading Kernel Image ... OK
Loading Device Tree to 5cf02000, end 5cf0a835 ... OK
Starting kernel ...
[ATF][ 6.145169]save kernel info
[ATF][ 6.148370]Kernel_EL2
[ATF][ 6.151127]Kernel is 64Bit
[ATF][ 6.154314]pc=0x40080000, r0=0x5cf02000, r1=0x0
INFO: BL3-1: Preparing for EL3 exit to normal world, Kernel
INFO: BL3-1: Next image address = 0x40080000
INFO: BL3-1: Next image spsr = 0x3c9
[ATF][ 6.172581]el3_exit
no output after that, but device boots and i can access via ssh
any idea on preloader for emmc?
is there a driver for soc-internal bgn-wifi (https://www.mediatek.com/products/homeNetworking/mt7622)?
for pwm i defined this:
pwm1_pins: pwm1-2-pins {
mux {
function = "pwm";
groups = "pwm_ch1_0";/* mt7622_pwm_ch1_0_pins[] = { 51, }; */
};
};
pwm2_pins: pwm1-2-pins {
mux {
function = "pwm";
groups = "pwm_ch2_0"; /*mt7622_pwm_ch2_0_pins[] = { 52, };*/
};
};
pwm4_pins: pwm1-2-pins {
mux {
function = "pwm";
groups = "pwm_ch4_1"; /*mt7622_pwm_ch4_1_pins[] = { 67, };*/
};
};
pwm5_pins: pwm1-2-pins {
mux {
function = "pwm";
groups = "pwm_ch5_0"; /*mt7622_pwm_ch5_0_pins[] = { 68, };*/
};
};
pwm6_pins: pwm1-2-pins {
mux {
function = "pwm";
groups = "pwm_ch6_0"; /*mt7622_pwm_ch6_0_pins[] = { 69, };*/
};
};
pwm7_pins: pwm1-2-pins {
mux {
function = "pwm";
groups = "pwm_ch7_2";
};
};
&pwm {
pinctrl-names = "default";
status = "okay";
pwm1 {
pinctrl-0 = <&pwm1_pins>;
};
pwm2 {
pinctrl-0 = <&pwm2_pins>;
};
pwm4 {
pinctrl-0 = <&pwm4_pins>;
};
pwm5 {
pinctrl-0 = <&pwm5_pins>;
};
pwm6 {
pinctrl-0 = <&pwm6_pins>;
};
pwm7 {
pinctrl-0 = <&pwm7_pins>;
};
};
is that right? it compiles 
and i see nodes in sysfs:
/sys/firmware/devicetree/base/pwm@11006000/pwm7
/sys/firmware/devicetree/base/pwm@11006000/pwm5
/sys/firmware/devicetree/base/pwm@11006000/pwm1
/sys/firmware/devicetree/base/pwm@11006000/pwm6
/sys/firmware/devicetree/base/pwm@11006000/pwm4
/sys/firmware/devicetree/base/pwm@11006000/pwm2
but gpio101 is not blocked as i expected, so i guess its is not working
maybe this is related: https://patchwork.kernel.org/project/linux-mediatek/list/?series=68207 but as far as i see it only maps the clocks and do not register a new pincontrol to subnode
for r2 pwm is defined like this (with constants, also only 1 pwm-node + 1 pin-define):
pwm_pins_a: pwm-default {
pins-pwm {
pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
<MT7623_PIN_204_PWM1_FUNC_PWM1>,
<MT7623_PIN_205_PWM2_FUNC_PWM2>,
<MT7623_PIN_206_PWM3_FUNC_PWM3>,
<MT7623_PIN_207_PWM4_FUNC_PWM4>;
};
};
but how to do this for r64, which has complete different pin-define?
R64 pinctrl arch is totally different so you should find the correct pin in the lookup table (pinctrl-mt7622.c), then set corresponding functions & groups.
But, what is the problem now? no console output?
I have console output after reenabling uart0 (was unsure which one is debug-uart).
I try to enable all pwms on gpio-header. If i do like i2c,i need to copy full pwm-node in dtsi for all pwms,right? Which adresses should i use? And imho i have to separate the clocks
I think i have used the correct ones for _pins-node,but i don’t get the mapping to top-node (currently only one “pwm”) working
this in dtsi:
pwm: pwm@11006000 {
compatible = "mediatek,mt7622-pwm";
reg = <0 0x11006000 0 0x1000>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_LOW>;
clocks = <&topckgen CLK_TOP_PWM_SEL>,
<&pericfg CLK_PERI_PWM_PD>,
<&pericfg CLK_PERI_PWM1_PD>,
<&pericfg CLK_PERI_PWM2_PD>,
<&pericfg CLK_PERI_PWM3_PD>,
<&pericfg CLK_PERI_PWM4_PD>,
<&pericfg CLK_PERI_PWM5_PD>,
<&pericfg CLK_PERI_PWM6_PD>;
clock-names = "top", "main", "pwm1", "pwm2", "pwm3", "pwm4",
"pwm5", "pwm6";
status = "disabled";
};
gets overridden in dts
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm7_pins>;
status = "okay";
}
can i simply add pinctrl-1,pinctrl-2,… in dts (have already defined pwmx_pins above)? or do i need to copy entire node (as done for i2c and spi) in dtsi? how does the system knows currently that it should use clock for pwm7 (which is missing in dtsi…only 1-6)?
tried to configure pwm7 (which is defined in dts)…
root@bpi-r64:~# echo 1 >/sys/class/pwm/pwmchip0/export
root@bpi-r64:~# echo 2 >/sys/class/pwm/pwmchip0/export
root@bpi-r64:~# echo 7 >/sys/class/pwm/pwmchip0/export
-bash: echo: write error: No such device
root@bpi-r64:~# ls /sys/class/pwm/pwmchip0
device export npwm power pwm1 pwm2 subsystem uevent unexporti activated pwm7 (pin 7) with the following patch from sean wang:
diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/medi
atek/mt7622.dtsi
index f166df933ca7..70a4fc37d919 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -388,9 +388,10 @@
<&pericfg CLK_PERI_PWM3_PD>,
<&pericfg CLK_PERI_PWM4_PD>,
<&pericfg CLK_PERI_PWM5_PD>,
- <&pericfg CLK_PERI_PWM6_PD>;
+ <&pericfg CLK_PERI_PWM6_PD>,
+ <&pericfg CLK_PERI_PWM7_PD>;
clock-names = "top", "main", "pwm1", "pwm2", "pwm3", "pwm4",
- "pwm5", "pwm6";
+ "pwm5", "pwm6", "pwm7";
status = "disabled";
};
diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
index eb6674ce995f..63c92250e063 100644
--- a/drivers/pwm/pwm-mediatek.c
+++ b/drivers/pwm/pwm-mediatek.c
@@ -285,7 +285,7 @@ static const struct mtk_pwm_platform_data mt2712_pwm_data = {
};
static const struct mtk_pwm_platform_data mt7622_pwm_data = {
- .num_pwms = 6,
+ .num_pwms = 7,
.pwm45_fixup = false,
.has_clks = true,
};
then i try to set 1hz period…fail…i can set faster frequency, but don’t see this on a simple LED
root@bpi-r64:~# echo 1000000000 > /sys/class/pwm/pwmchip0/pwm6/period
-bash: echo: write error: Invalid argument
root@bpi-r64:~# echo 10000000 > /sys/class/pwm/pwmchip0/pwm6/period
root@bpi-r64:~# echo 5000000 > /sys/class/pwm/pwmchip0/pwm6/duty_cycle
root@bpi-r64:~# echo 1 > /sys/class/pwm/pwmchip0/pwm6/enable
root@bpi-r64:~#
main problem i’m facing currently is that sometimes my sdcard is not recognized while booting kernel (uboot has no problem with it)
[ 3.179211] mmc0: tried to HW reset card, got error -84
[ 3.185586] print_req_error: I/O error, dev mmcblk0, sector 4924424
[ 3.192592] print_req_error: I/O error, dev mmcblk0, sector 4924425
[ 3.199155] print_req_error: I/O error, dev mmcblk0, sector 4924426
[ 3.206770] print_req_error: I/O error, dev mmcblk0, sector 4924428
[ 3.213346] print_req_error: I/O error, dev mmcblk0, sector 4924429
[ 3.219994] print_req_error: I/O error, dev mmcblk0, sector 4924430
[ 3.227016] print_req_error: I/O error, dev mmcblk0, sector 4924431
[ 3.233849] print_req_error: I/O error, dev mmcblk0, sector 1650688
[ 3.241240] print_req_error: I/O error, dev mmcblk0, sector 1650688
[ 3.247752] Starting init: /sbin/init exists but couldn't execute it (error )
[ 3.255304] Run /etc/init as init process
[ 3.261017] print_req_error: I/O error, dev mmcblk0, sector 800984
[ 3.269822] EXT4-fs error (device mmcblk0p2): ext4_find_entry:1439: inode #10
[ 3.291701] mmcblk0: error -84 requesting status
[ 3.358604] mmc0: tried to HW reset card, got error -84
[ 3.364002] mmcblk0: recovery failed!
[ 3.367787] Buffer I/O error on dev mmcblk0p2, logical block 0, lost sync pae
[ 3.375792] EXT4-fs (mmcblk0p2): I/O error while writing superblock
[ 3.382275] Starting init: /etc/init exists but couldn't execute it (error -)
[ 3.389744] Run /bin/init as init process
[ 3.397773] EXT4-fs error (device mmcblk0p2): ext4_find_entry:1439: inode #20
fsck and badblocks on my host-pc shows no errors…it’s a samsung evo+ 32GB
Driver
FW:
You can try basic AP mode now. Power saving stuff and STA mode are not ready.
Simple hostapd configuration:
interface=wlan0 driver=nl80211 ssid=126test hw_mode=g channel=1 ieee80211n=1
iperf result in open environment (HT 2x2)
Thank you for your work,r64 onboard mt7615 is also supported?
Onboard mt7622 (rbus 4*4n) doesn’t yet support, but i think it is quite easy to add rbus stuff.
Firstly you can try PCIe interface.
have added driver to new dir “mt76_new” because 4.19 contains already a mt76-directory, changed Makefiles and KConfigs to match new directory
build without errors/warnings/… but pci-probe failes
[ 5.316546] mt7615e 0000:01:00.0: assign IRQ: got 124
[ 5.322113] pci 0000:00:00.0: enabling bus mastering
[ 5.327361] mt7615e: probe of 0000:01:00.0 failed with error -22
root@bpi-r64:~# lspci
00:00.0 Non-VGA unclassified device: MEDIATEK Corp. Device 3258
01:00.0 Unclassified device [0002]: MEDIATEK Corp. Device 7615
root@bpi-r64:~# ls /lib/firmware/mediatek/
mt7615_cr4.bin mt7615_n9.bin mt7615_rom_patch.bin mt7622pr2h.bin
root@bpi-r64:~# find /lib/modules/$(uname -r) -iname '*mt7615*'
/lib/modules/4.19.20-r64-main/kernel/drivers/net/wireless/mediatek/mt76_new/mt7615
/lib/modules/4.19.20-r64-main/kernel/drivers/net/wireless/mediatek/mt76_new/mt7615/mt7615e.ko
root@bpi-r64:~#
error-essage is a global one (not mt7615 specific)
drivers/base/dd.c:570: "%s: probe of %s failed with error %d\n",
-22 should be “invalid argument”
https://elixir.bootlin.com/linux/v4.19.20/source/include/uapi/asm-generic/errno-base.h#L26
can i enable a more verbose debug? have already “debug=7” in my cmdline and CONFIG_PCI_DEBUG set
also i cannot remove the module (to reload again)
root@bpi-r64:~# modprobe -r mt7615e
modprobe: ERROR: ../libkmod/libkmod-module.c:777 kmod_module_remove_module() could not remove 'mt7615e': Function not implemented
ok, this needs option “CONFIG_MODULE_UNLOAD=y”
I didn’t see that error before. You should insmod 7615 module, then it will load firmware automatically.
i had reloaded module via
modprobe -r mt7615e
modprobe mt7615e
same error
can i debug this anyhow?
i currently use jacks jessie image, because samsung microsd (debian stretch) is mostly undetected by kernel
did you load the other dependency modules? something like mt76.ko ?
mt76, mac80211 and cfg80211 will be loaded automaticly
01:00.0 Unclassified device [0002]: MEDIATEK Corp. Device 7615 (prog-if 80)
Subsystem: Device 7615:14c3
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin A routed to IRQ 124
Region 0: Memory at <unassigned> (64-bit, non-prefetchable) [disabled]
Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [78] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [80] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <2us, L1 <2us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #1, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <64ns, L1 <2us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [100 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed- WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
Status: NegoPending- InProgress-
lsmod after bootup and reloading of module
root@bpi-r64:~# lsmod
Module Size Used by
mt7615e 32768 0
mt76 40960 1 mt7615e
mac80211 339968 2 mt76,mt7615e
cfg80211 249856 3 mt76,mt7615e,mac80211
root@bpi-r64:~# modprobe -r mt7615e
root@bpi-r64:~# echo "9 9 9 9" > /proc/sys/kernel/printk
root@bpi-r64:~# cat /proc/sys/kernel/printk
9 9 9 9
root@bpi-r64:~# lsmod
Module Size Used by
root@bpi-r64:~# modprobe mt7615e
[ 144.632560] cfg80211: Loading compiled-in X.509 certificates for regulatory database
[ 144.641521] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
[ 144.648398] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
[ 144.657379] cfg80211: failed to load regulatory.db
[ 144.673037] mt7615e 0000:01:00.0: assign IRQ: got 124
[ 144.678388] mt7615e: probe of 0000:01:00.0 failed with error -22
root@bpi-r64:~# lsmod
Module Size Used by
mt7615e 32768 0
mt76 40960 1 mt7615e
mac80211 339968 2 mt76,mt7615e
cfg80211 249856 3 mt76,mt7615e,mac80211
root@bpi-r64:~#does pcie host controller work on 4.19? or you can add some printk in mt7615_pci_probe() and mt7615_init_hardware() as everything goes well on my 7622 (5.0-rc1).
at least i see the card in lspci…
root@bpi-r64:~# modprobe mt7615e
[ 51.599990] DEBUG: Passed really_probe 477
[ 51.604379] DEBUG: Passed really_probe 480 ret:0
[ 51.609411] DEBUG: Passed really_probe 483
[ 51.613881] DEBUG: Passed really_probe 487
[ 51.618309] DEBUG: Passed really_probe 493
[ 51.622805] mt7615e 0000:01:00.0: assign IRQ: got 124
[ 51.628594] DEBUG: Passed mt7615_pci_probe 88 ret:0
[ 51.633836] DEBUG: Passed mt7615_pci_probe 93 ret:-22
[ 51.639229] DEBUG: Passed really_probe 504 ret:-22
[ 51.644310] mt7615e: probe of 0000:01:00.0 failed with error -22
which leads to this:
ret = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev));
printk(KERN_ALERT "DEBUG: Passed %s %d ret:%d \n",__FUNCTION__,__LINE__,ret);
if (ret)
return ret;show me the full pcie log. It seems you lost some patches in your tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/log/drivers/pci/controller/pcie-mediatek.c
But maybe you can upgrade kernel to 5.0, at least it works on my R2 and MT7622
2.164056] mt7615e 0000:01:00.0: HW/SW Version: 0x8a108a10, Build Time: 20180518100604a
[ 2.164056]
[ 2.185353] mt7615e 0000:01:00.0: N9 Firmware Version: _reserved_, Build Time: 20181016015407
[ 2.199062] mt7615e 0000:01:00.0: CR4 Firmware Version: _reserved_, Build Time: 20181026204618root@bpi-r64:~# dmesg | grep pci
[ 3.081226] mtk-pcie 1a140000.pcie: Port1 link down
[ 3.086375] mtk-pcie 1a140000.pcie: PCI host bridge to bus 0000:00
[ 3.092761] pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0]
[ 3.099770] pci_bus 0000:00: root bus resource [mem 0x20000000-0x2fffffff]
[ 3.106869] pci_bus 0000:00: root bus resource [bus 00-ff]
[ 3.112536] pci_bus 0000:00: scanning bus
[ 3.116712] pci 0000:00:00.0: [14c3:3258] type 01 class 0x060000
[ 3.122940] pci 0000:00:00.0: ignoring class 0x060000 (doesn't match header type 01)
[ 3.132392] pci_bus 0000:00: fixups for bus
[ 3.136717] pci 0000:00:00.0: scanning [bus 00-00] behind bridge, pass 0
[ 3.143637] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[ 3.151913] pci 0000:00:00.0: scanning [bus 00-00] behind bridge, pass 1
[ 3.158925] pci_bus 0000:01: scanning bus
[ 3.163198] pci 0000:01:00.0: [14c3:7615] type 00 class 0x000280
[ 3.169637] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x000fffff 64bit]
[ 3.177578] pci 0000:01:00.0: 2.000 Gb/s available PCIe bandwidth, limited by 2.5 GT/s x1 link at 0000:00:00.0 (capable of 4.000 Gb/s with 5 G)
[ 3.193145] pci_bus 0000:01: fixups for bus
[ 3.197467] pci_bus 0000:01: bus scan returning with max=01
[ 3.203223] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
[ 3.210057] pci_bus 0000:00: bus scan returning with max=01
[ 3.215821] pci 0000:01:00.0: BAR 0: no space for [mem size 0x00100000 64bit]
[ 3.223189] pci 0000:01:00.0: BAR 0: failed to assign [mem size 0x00100000 64bit]
[ 3.230914] pci 0000:00:00.0: not setting up bridge for bus 0000:01
[ 6.715877] pci 0000:00:00.0: enabling bus mastering
[ 6.721421] DEBUG: Passed mt7615_pci_probe 88 ret:0
[ 6.726889] DEBUG: Passed mt7615_pci_probe 93 ret:-22
[ 51.628594] DEBUG: Passed mt7615_pci_probe 88 ret:0
[ 51.633836] DEBUG: Passed mt7615_pci_probe 93 ret:-22
why you have removed the link to patchwork? i want to try this…
Because I know the reason:
pci 0000:00:00.0: ignoring class 0x060000 (doesn’t match header type 01)
PCI: mediatek: Fix class type for MT7622 to PCI_CLASS_BRIDGE_PCI
I guess you lost this patch in the branch.
[ 6.791731] DEBUG: Passed mt7615_pci_probe 128 ret:-2
leads to
ret = mt7615_register_device(dev);
full log:
root@bpi-r64:~# dmesg | grep pci
[ 3.071573] mtk-pcie 1a140000.pcie: Port1 link down
[ 3.076724] mtk-pcie 1a140000.pcie: PCI host bridge to bus 0000:00
[ 3.083111] pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0]
[ 3.090120] pci_bus 0000:00: root bus resource [mem 0x20000000-0x2fffffff]
[ 3.097221] pci_bus 0000:00: root bus resource [bus 00-ff]
[ 3.102886] pci_bus 0000:00: scanning bus
[ 3.107061] pci 0000:00:00.0: [14c3:3258] type 01 class 0x060400
[ 3.113314] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0xffffffff 64bit pref]
[ 3.122239] pci_bus 0000:00: fixups for bus
[ 3.126567] pci 0000:00:00.0: scanning [bus 00-00] behind bridge, pass 0
[ 3.133488] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[ 3.141764] pci 0000:00:00.0: scanning [bus 00-00] behind bridge, pass 1
[ 3.148787] pci_bus 0000:01: scanning bus
[ 3.153060] pci 0000:01:00.0: [14c3:7615] type 00 class 0x000280
[ 3.159505] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x000fffff 64bit]
[ 3.167453] pci 0000:01:00.0: 2.000 Gb/s available PCIe bandwidth, limited by 2.5 GT/s x1 link at 0000:00:00.0 (capable of 4.000 Gb/s with 5 G)
[ 3.183013] pci_bus 0000:01: fixups for bus
[ 3.187336] pci_bus 0000:01: bus scan returning with max=01
[ 3.193092] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
[ 3.199926] pci_bus 0000:00: bus scan returning with max=01
[ 3.205711] pci 0000:00:00.0: BAR 0: no space for [mem size 0x100000000 64bit pref]
[ 3.213616] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x100000000 64bit pref]
[ 3.221880] pci 0000:00:00.0: BAR 8: assigned [mem 0x20000000-0x200fffff]
[ 3.228893] pci 0000:01:00.0: BAR 0: assigned [mem 0x20000000-0x200fffff 64bit]
[ 3.236526] pci 0000:00:00.0: PCI bridge to [bus 01]
[ 3.241664] pci 0000:00:00.0: bridge window [mem 0x20000000-0x200fffff]
[ 6.711729] pci 0000:00:00.0: enabling device (0000 -> 0002)
[ 6.719562] pci 0000:00:00.0: enabling bus mastering
Because 4.19 is last lts and other drivers (switch) based on this and want to get it working on this version and can’t upgrade to 5.0 at this moment