WARNING first: switch off the 12 V to miniPCIe, see the Startup in Wiki!!!
Running here: BPI R4 + WD NVME + Sierra Wireless EM9191 in M.2 slot using PCie (isolated SIM detect pin in M.2 connector)
Objective: to be added Intel 7260 HMW Wifi module in one of the bottom miniPCIe slots.
Build Kernel 6.6.36 , openwrt build environment set up around 2024-Jul-6, branch master
From the running setup incl NVMe and EM9191 I added 7260HMW to one of the bottom slots, it got detected somewhat in my build, result (filtered) looked at dmesg:
[ 0.049558] mtk-pcie-gen3 11280000.pcie: host bridge /soc/pcie@11280000 ranges:
[ 0.049577] mtk-pcie-gen3 11280000.pcie: Parsing ranges property...
[ 0.049691] mtk-pcie-gen3 11290000.pcie: host bridge /soc/pcie@11290000 ranges:
[ 0.049702] mtk-pcie-gen3 11290000.pcie: Parsing ranges property...
[ 0.049750] mtk-pcie-gen3 11290000.pcie: failed to get clocks
[ 0.049812] mtk-pcie-gen3 11300000.pcie: host bridge /soc/pcie@11300000 ranges:
[ 0.049822] mtk-pcie-gen3 11300000.pcie: Parsing ranges property...
[ 0.049865] mtk-pcie-gen3 11300000.pcie: failed to get clocks
[ 0.049938] mtk-pcie-gen3 11310000.pcie: host bridge /soc/pcie@11310000 ranges:
[ 0.049947] mtk-pcie-gen3 11310000.pcie: Parsing ranges property...
[ 0.049988] mtk-pcie-gen3 11310000.pcie: failed to get clocks
[ 2.272401] mtk-pcie-gen3 11280000.pcie: host bridge /soc/pcie@11280000 ranges:
[ 2.279719] mtk-pcie-gen3 11280000.pcie: Parsing ranges property...
[ 2.645003] mtk-pcie-gen3 11280000.pcie: PCI host bridge to bus 0003:00
[ 3.286481] mtk-pcie-gen3 11290000.pcie: host bridge /soc/pcie@11290000 ranges:
[ 3.293794] mtk-pcie-gen3 11290000.pcie: Parsing ranges property...
[ 3.671656] mtk-pcie-gen3 11290000.pcie: PCI host bridge to bus 0002:00
[ 4.289110] mtk-pcie-gen3 11300000.pcie: host bridge /soc/pcie@11300000 ranges:
[ 4.296419] mtk-pcie-gen3 11300000.pcie: Parsing ranges property...
[ 4.651781] mtk-pcie-gen3 11300000.pcie: PCIe link down, current LTSSM state: detect.quiet (0x1)
[ 4.660567] mtk-pcie-gen3: probe of 11300000.pcie failed with error -110
[ 4.667498] mtk-pcie-gen3 11310000.pcie: host bridge /soc/pcie@11310000 ranges:
[ 4.674810] mtk-pcie-gen3 11310000.pcie: Parsing ranges property...
[ 5.031781] mtk-pcie-gen3 11310000.pcie: PCIe link down, current LTSSM state: polling.compliance (0x3000003)
[ 5.041602] mtk-pcie-gen3: probe of 11310000.pcie failed with error -110
11280000, 11290000 is NVMe and EM9191, successfully deteted. 11300000 is the empty miniPCIe slot (mid of PCB). 11310000 is the one having 7260, this is reporting “polling compliance” error (3), text report in since 6.x.
To check I did download default BPI image from BPI wiki, surprisingly this showed the 7260 in sys/bus/pci/devices. As a result it can be assumed that pins are connected correctly and electrically the 7260 wold work on 6.6 as well, the default image has Kernel 5.4.271.
First found on forums some info that 7260 isn’t running at all, this became invalid from test by default image. Another note was pointing to devicetree issues in combination with MSI interrup split. getting the devicetrees form both systems (dtc tool + and mt7988a.dtsi), show isolation of interrupt domains (separate controller functions) for 6.6, GPIO looked all to be defined by checking pinctrl definitions.
Looking up kernel 6.6 source in my build, I found above LTSSM statement in source pcie-mediatek-gen3.c. Looking up same source in Kernel 5.4.246 (set up by Sinovoip BSP, not buildable for me) revealed some different structure including an extra delay in 6.6 for the basic probe procedure mtk_pcie_startup_port(). Aligning the 6.6 procedure the way it is done in 5.4 (removing the delay, only one de-assert call) cahnged the situation. After rebuilding now all 3 PCIe devices get detected, with some further work adding Intel firmware for 7260, iwlwifi tools and luci support for WiFi, now WiFi can be set up and is usable using the Intel 7260 HMW miniPCIe card.
Why removing the delay changes situation is unclear, also unclear why this change came to openwrt. In latest file in kernel mainline the delay is absent as well.
It should be checked whether same patch allows to run ATHEROS/QC Wifi cards and other PCIe devices as well, first step is to look for above mentioned LTSSM statement.
To share the patch to get a running build:
diff --git a/a/pcie-mediatek-gen3.c b/b/pcie-mediatek-gen3.c
index 826d7ea..975b302 100644
--- a/a/pcie-mediatek-gen3.c
+++ b/b/pcie-mediatek-gen3.c
@@ -375,13 +375,7 @@ static int mtk_pcie_startup_port(struct mtk_gen3_pcie *pcie)
msleep(100);
/* De-assert reset signals */
- val &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB);
- writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
-
- msleep(100);
-
- /* De-assert PERST# signals */
- val &= ~(PCIE_PE_RSTB);
+ val &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB | PCIE_PE_RSTB);
writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
/* Check if the link is up or not */
Have fun Konrad
