With the help of debugging, I have narrowed it down a bit:
It seems that the kernel depends on U-Boot to setup the source clock correctly.
Without U-Boot:
[ 14.749160] mmc0: clock 400000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 8 timing 0
[ 14.756807] mtk-msdc 11230000.mmc: Bus Width = 3
[ 14.761408] mmc0: starting CMD8 arg 00000000 flags 000000b5
[ 14.766969] mmc0: blksz 512 blocks 1 flags 00000200 tsac 150 ms nsac 0
[ 14.774129] mtk-msdc 11230000.mmc: msdc_irq: events=00002140
[ 14.779778] mtk-msdc 11230000.mmc: DMA start
[ 14.784032] mtk-msdc 11230000.mmc: msdc_start_data: cmd=8 DMA data: 1 blocks; read=1
[ 14.791754] mtk-msdc 11230000.mmc: msdc_irq: events=00003040
[ 14.797395] mtk-msdc 11230000.mmc: DMA status: 0x 6
[ 14.802778] mtk-msdc 11230000.mmc: DMA stop
[ 14.806945] mmc0: req done (CMD8): 0: 00000900 00000000 00000000 00000000
[ 14.813713] mmc0: 512 bytes transferred: 0
[ 14.818151] mmc0: starting CMD6 arg 03b90201 flags 0000049d
[ 14.824009] mtk-msdc 11230000.mmc: msdc_irq: events=00002140
[ 14.829652] mmc0: req done (CMD6): 0: 00000800 00000000 00000000 00000000
[ 14.836429] mmc0: clock 400000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 8 timing 9
[ 14.844067] mtk-msdc 11230000.mmc: Bus Width = 3
[ 14.848696] mtk-msdc 11230000.mmc: sclk: 400000, timing: 9
[ 14.854163] mmc0: clock 52000000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 8 timing 9
[ 14.861980] mtk-msdc 11230000.mmc: Bus Width = 3
[ 14.866626] mtk-msdc 11230000.mmc: sclk: 40000000, timing: 9
[ 14.872268] mmc0: starting CMD13 arg 00010000 flags 00000195
[ 14.877925] mtk-msdc 11230000.mmc: msdc_irq: events=00002140
[ 14.883568] mmc0: req done (CMD13): 0: 00000900 00000000 00000000 00000000
[ 14.890433] mmc0: clock 200000000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 8 timing 9
[ 14.898339] mtk-msdc 11230000.mmc: Bus Width = 3
[ 14.902950] mtk-msdc 11230000.mmc: sclk: 40000000, timing: 9
[ 16.754042] mmc0: clock 200000000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 8 timing 1
[ 16.761948] mtk-msdc 11230000.mmc: Bus Width = 3
[ 16.766565] mtk-msdc 11230000.mmc: sclk: 40000000, timing: 1
[ 16.772206] mmc0: clock 52000000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 8 timing 1
[ 16.780022] mtk-msdc 11230000.mmc: Bus Width = 3
[ 16.784633] mtk-msdc 11230000.mmc: sclk: 40000000, timing: 1
[ 16.790280] mmc0: starting CMD13 arg 00010000 flags 00000195
[ 16.795939] mtk-msdc 11230000.mmc: msdc_irq: events=00002140
[ 16.801581] mmc0: req done (CMD13): 0: 00000900 00000000 00000000 00000000
[ 16.808446] mmc0: starting CMD6 arg 03b70601 flags 0000049d
[ 16.814012] mtk-msdc 11230000.mmc: msdc_irq: events=00002140
[ 16.819655] mmc0: req done (CMD6): 0: 00000800 00000000 00000000 00000000
[ 16.826434] mmc0: starting CMD13 arg 00010000 flags 00000195
[ 16.832085] mtk-msdc 11230000.mmc: msdc_irq: events=00002140
[ 16.837728] mmc0: req done (CMD13): 0: 00000900 00000000 00000000 00000000
[ 16.844594] mmc0: starting CMD6 arg 03b90301 flags 0000049d
[ 16.850169] mtk-msdc 11230000.mmc: msdc_irq: events=00002140
[ 16.855812] mmc0: req done (CMD6): 0: 00000800 00000000 00000000 00000000
[ 16.862589] mmc0: clock 52000000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 8 timing 10
[ 16.870496] mtk-msdc 11230000.mmc: Bus Width = 3
[ 16.875108] mtk-msdc 11230000.mmc: sclk: 20000000, timing: 10
[ 16.880842] mmc0: clock 200000000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 8 timing 10
[ 16.888831] mtk-msdc 11230000.mmc: Bus Width = 3
[ 16.893442] mtk-msdc 11230000.mmc: sclk: 20000000, timing: 10
With U-Boot:
[ 18.586262] mmc0: clock 400000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 8 timing 0
[ 18.593908] mtk-msdc 11230000.mmc: Bus Width = 3
[ 18.598509] mmc0: starting CMD8 arg 00000000 flags 000000b5
[ 18.604070] mmc0: blksz 512 blocks 1 flags 00000200 tsac 150 ms nsac 0
[ 18.611228] mtk-msdc 11230000.mmc: msdc_irq: events=00002140
[ 18.616877] mtk-msdc 11230000.mmc: DMA start
[ 18.621130] mtk-msdc 11230000.mmc: msdc_start_data: cmd=8 DMA data: 1 blocks; read=1
[ 18.628853] mtk-msdc 11230000.mmc: msdc_irq: events=00003040
[ 18.634494] mtk-msdc 11230000.mmc: DMA status: 0x 6
[ 18.639876] mtk-msdc 11230000.mmc: DMA stop
[ 18.644043] mmc0: req done (CMD8): 0: 00000900 00000000 00000000 00000000
[ 18.650812] mmc0: 512 bytes transferred: 0
[ 18.655249] mmc0: starting CMD6 arg 03b90201 flags 0000049d
[ 18.661103] mtk-msdc 11230000.mmc: msdc_irq: events=00002140
[ 18.666745] mmc0: req done (CMD6): 0: 00000800 00000000 00000000 00000000
[ 18.673522] mmc0: clock 400000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 8 timing 9
[ 18.681160] mtk-msdc 11230000.mmc: Bus Width = 3
[ 18.685786] mtk-msdc 11230000.mmc: sclk: 400000, timing: 9
[ 18.691255] mmc0: clock 52000000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 8 timing 9
[ 18.699071] mtk-msdc 11230000.mmc: Bus Width = 3
[ 18.703713] mtk-msdc 11230000.mmc: sclk: 52000000, timing: 9
[ 18.709354] mmc0: starting CMD13 arg 00010000 flags 00000195
[ 18.715010] mtk-msdc 11230000.mmc: msdc_irq: events=00002140
[ 18.720654] mmc0: req done (CMD13): 0: 00000900 00000000 00000000 00000000
[ 18.727519] mmc0: clock 200000000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 8 timing 9
[ 18.735426] mtk-msdc 11230000.mmc: Bus Width = 3
[ 18.740035] mtk-msdc 11230000.mmc: sclk: 104000000, timing: 9
[ 20.591002] mmc0: clock 200000000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 8 timing 1
[ 20.598908] mtk-msdc 11230000.mmc: Bus Width = 3
[ 20.603523] mtk-msdc 11230000.mmc: sclk: 104000000, timing: 1
[ 20.609251] mmc0: clock 52000000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 8 timing 1
[ 20.617068] mtk-msdc 11230000.mmc: Bus Width = 3
[ 20.621676] mtk-msdc 11230000.mmc: sclk: 52000000, timing: 1
[ 20.627323] mmc0: starting CMD13 arg 00010000 flags 00000195
[ 20.632972] mtk-msdc 11230000.mmc: msdc_irq: events=00002140
[ 20.638614] mmc0: req done (CMD13): 0: 00000900 00000000 00000000 00000000
[ 20.645479] mmc0: starting CMD6 arg 03b70601 flags 0000049d
[ 20.651043] mtk-msdc 11230000.mmc: msdc_irq: events=00002140
[ 20.656685] mmc0: req done (CMD6): 0: 00000800 00000000 00000000 00000000
[ 20.663463] mmc0: starting CMD13 arg 00010000 flags 00000195
[ 20.669113] mtk-msdc 11230000.mmc: msdc_irq: events=00002140
[ 20.674755] mmc0: req done (CMD13): 0: 00000900 00000000 00000000 00000000
[ 20.681619] mmc0: starting CMD6 arg 03b90301 flags 0000049d
[ 20.687193] mtk-msdc 11230000.mmc: msdc_irq: events=00002140
[ 20.692836] mmc0: req done (CMD6): 0: 00000800 00000000 00000000 00000000
[ 20.699614] mmc0: clock 52000000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 8 timing 10
[ 20.707521] mtk-msdc 11230000.mmc: Bus Width = 3
[ 20.712130] mtk-msdc 11230000.mmc: sclk: 52000000, timing: 10
[ 20.717865] mmc0: clock 200000000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 8 timing 10
[ 20.725855] mtk-msdc 11230000.mmc: Bus Width = 3
[ 20.730463] mtk-msdc 11230000.mmc: sclk: 104000000, timing: 10
And here are the differences:
Without U-Boot, but with CRC errors:
[ 14.848696] mtk-msdc 11230000.mmc: sclk: 400000, timing: 9
[ 14.866626] mtk-msdc 11230000.mmc: sclk: 40000000, timing: 9
[ 14.902950] mtk-msdc 11230000.mmc: sclk: 40000000, timing: 9
[ 16.766565] mtk-msdc 11230000.mmc: sclk: 40000000, timing: 1
[ 16.784633] mtk-msdc 11230000.mmc: sclk: 40000000, timing: 1
[ 16.875108] mtk-msdc 11230000.mmc: sclk: 20000000, timing: 10
[ 16.893442] mtk-msdc 11230000.mmc: sclk: 20000000, timing: 10
With U-Boot, but without CRC errors:
[ 18.685786] mtk-msdc 11230000.mmc: sclk: 400000, timing: 9
[ 18.703713] mtk-msdc 11230000.mmc: sclk: 52000000, timing: 9
[ 18.740035] mtk-msdc 11230000.mmc: sclk: 104000000, timing: 9
[ 20.603523] mtk-msdc 11230000.mmc: sclk: 104000000, timing: 1
[ 20.621676] mtk-msdc 11230000.mmc: sclk: 52000000, timing: 1
[ 20.712130] mtk-msdc 11230000.mmc: sclk: 52000000, timing: 10
[ 20.730463] mtk-msdc 11230000.mmc: sclk: 104000000, timing: 10
So the sclk clock is different when starting with U-Boot and without U-Boot
How to setup the sourceclock, so that it will set the correct frequency? Can this be fixed in the devicetree?
Edit:
clk_get_rate(host->src_clk) returns different values. Calculation of sclk depends on this.
Without U-Boot:
clk_get_rate(host->src_clk) returns 40000000
With U-Boot:
clk_get_rate(host->src_clk) returns 416000000
Notice a factor 10.4 difference.
It means that the kernel fails to set the clock to 416M. Correct functioning of the mmc-host relies on U-Boot to set the clock at 416M.
I have changed the topic accordingly.
Edit2:
Is it possible to set the rate via devicetree with assigned-clocks and assigned-clock-rates ?
Edit3:
Yup. Adding the following:
&mmc0 {
assigned-clocks = <&topckgen CLK_TOP_EMMC_416M_SEL>;
assigned-clock-rates = <416000000>;
};
Makes clk_get_rate(host->src_clk) return 416000000, even if U-Boot is not in the bootchain. I checked, also no more CRC errors.
@frank-w I’m am still not sure why the clock rate needs to be set in the devicetree, and if this i a good fix or only hiding the symptom of a real bug? What do you think?
