Boot fails with self-build u-boot

Banana Pi Router design
1

Hello,

i’m trying to build u-boot and replacing the one delivered in the ubuntu image. But as soon as I put it on the sd card, the bananapi won’t load u-boot anymore. I get the following output on the UART debug

[PART] load "UBOOT" from 0x0000000000050000 (dev) to 0x81E00000 (mem) [SUCCESS]
[PART] load speed: 6232KB/s, 300000 bytes, 47ms
[BT_SD_PG] device info 0x8590 0x8A00 0xCB01 0x102
0:dram_rank_size:80000000
[PLFM] md_type[0] = 0
[PLFM] md_type[1] = 0

[PLFM] boot reason: 0
[PLFM] boot mode: 0
[PLFM] META COM0: 0
[PLFM] <0xFFB7CC10>: 0x0
[PLFM] boot time: 1894ms
[PLFM] DDR reserve mode: enable = 0, success = 0

[BLDR] jump to 0x81E00000
[BLDR] <0x81E00000>=0xEA00000F
[BLDR] <0x81E00004>=0xE59FF014

Here are the steps that I did to replace the u-boot of the ubuntu image

sudo dd if=2017-09 of=dev/sdc bs=1m
git clone https://github.com/BPI-SINOVOIP/BPI-R2-bsp
cd BPI-R2-bsp
./configure BPI-R2-720P
. ./env.sh
make u-boot
make pack
gunzip --stdout out/bpi-r2/100MB/BPI-R2-720P-2k.img.gz | sudo dd of=/dev/sdc bs=1k seek=2 count=1022

Anybody knows what i’m missing?

Complete boot output

[USBD] USB PRB0 LineState: 0

[USBD] USB cable/ No Cable inserted!lect

[PLFM] Keep stay in USB Mode
Platform initialization is ok
wait for frequency meter finish, CLK26CALI = 0x81
mt_pll_post_init: mt_get_cpu_freq = 1040000Khz
wait for frequency meter finish, CLK26CALI = 0x90
mt_pll_post_init: mt_get_bus_freq = 273000Khz
wait for frequency meter finish, CLK26CALI = 0x81
mt_pll_post_init: mt_get_mem_freq = 133250Khz
[PWRAP] pwrap_init_preloader
[PWRAP] pwrap_init
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=0,rdata=2D52
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=1,rdata=2D52
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=2,rdata=2D52
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=3,rdata=2D52
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=4 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=5 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=6 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=7 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=8 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=9 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=10 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=11 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=12,rdata=B54B                                                                                                                                     [246/1268]
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=13,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=14,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=15,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=16,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=17,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=18,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=19,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=20,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=21,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=22,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=23,rdata=6A97
[PWRAP] _pwrap_init_reg_clock
[PMIC_WRAP]wrap_init pass,the return value=0.
[pmic6323_init] Preloader Start..................
[pmic6323_init] PMIC CHIP Code = 0x2023
INT_MISC_CON: 1  TOP_RST_MISC: 1
pl pmic powerkey Press
[pmic6323_init] powerKey = 1
[pmic6323_init] is USB in = 0xB004
[pmic6323_init] Reg[0x11A]=0x1B
pmic setup LED
[pmic6323_init] Done...................
mt7623 disable long press reset ->>>>>
mt7623 disable long press reset <<<<<-
mt7623 VPA supplied by 1.0V to MT7530 ->
mt7623 VPA supplied by 1.0V to MT7530 <-
mt7623 enables RG_VGP1_EN for LCM ->
mt7623 enables RG_VGP1_EN for LCM <-
MT7623 E2 setting =>
MT7623 E2 setting <=
[PLFM] Init I2C: OK(0)
[PLFM] Init PWRAP: OK(0)
[PLFM] Init PMIC: OK(0)
[PLFM] chip[CA00]

[BLDR] [Support SD/eMMC] Build Time: 20170210-093340
==== Dump RGU Reg ========
RGU MODE:     4D
RGU LENGTH:   FFE0
RGU STA:      0
RGU INTERVAL: FFF
RGU SWSYSRST: 0
==== Dump RGU Reg End ====
RGU: g_rgu_satus:0
 mtk_wdt_mode_config  mode value=10, tmp:22000010
PL P ON
WDT does not trigger reboot
RGU mtk_wdt_init:MTK_WDT_DEBUG_CTL(590200F3)
kpd read addr: 0x0040: data:0x4001
Enter mtk_kpd_gpio_set!
kpd debug column : 0, 0, 0, 0, 0, 0, 0, 0
kpd debug row : 0, 0, 0, 0, 0, 0, 0, 0
after set KP enable: KP_SEL = 0x0 !
MTK_PMIC_RST_KEY is used for this project!
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=3968
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] bbpu = 0xD, con = 0x426
[RTC] powerkey1 = 0xA357, powerkey2 = 0x67D2
Writeif_unlock
[RTC] RTC_SPAR0=0x40
rtc_2sec_reboot_check cali=768
rtc_2sec_stat_clear
[RTC] irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x40, spar1 = 0x800
[RTC] new_spare0 = 0x0, new_spare1 = 0x1, new_spare2 = 0x1, new_spare3 = 0x1
[RTC] bbpu = 0xD, con = 0x426, cali = 0x300
pl pmic powerkey Press
power key is pressed
[PLFM] Power key boot!
[RTC] rtc_bbpu_power_on done
[EMI] mcp_dram_num:0,discrete_dram_num:1,enable_combo_dis:0
[EMI] PCDDR3
[Check]mt_get_mdl_number 0x0
[EMI] eMMC/NAND ID = 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
[EMI] MDL number = 0
[EMI] emi_set eMMC/NAND ID = 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
[EMI][Vcore]0x21E=0x48,0x220=0x48
[EMI][Vmem]0x554=0x0
wait for frequency meter finish, CLK26CALI = 0x81
[EMI] PCDDR3 DRAM Clock = 1333004 KHz, MEMPLL MODE = 2
[EMI] PCDDR3 RXTDN Calibration:
Start REXTDN SW calibration...
drvp=0xB,drvn=0x9
[EMI] pinmux = 4
===============================================================================

        dramc_write_leveling_swcal
===============================================================================
delay  byte0  byte1  byte2  byte3
-----------------------------
0    0    0    0    0
1    0    0    0    0
2    0    0    1    1
3    0    0    1    1
4    0    1    1    1
5    0    1    1    1
6    0    1    1    1
7    0    1    1    1
8    1    1    1    1
9    1    1    1    1
10    1    1    1    1
11    1    1    1    1
12    1    1    1    1
13    1    1    1    1
14    1    1    1    1
15    1    1    1    1
pass bytecount = 4
byte_i    status    best delay
0    2    8
1    2    4
2    2    2
3    2    2
========================================
[write leveling]DQS: 0x2248, DQM: 0x2248
[write leveling after remap]DQ byte0 reg: 0x200 val: 0x88884444
[write leveling after remap]DQ byte1 reg: 0x204 val: 0x44448888
[write leveling after remap]DQ byte2 reg: 0x208 val: 0x22222222
[write leveling after remap]DQ byte3 reg: 0x20C val: 0x22222222
=============================================
X-axis: DQS Gating Window Delay (Fine Scale)
Y-axis: DQS Gating Window Delay (Coarse Scale)
=============================================
          0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
      --------------------------------------------------------------------------------
0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0010:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    1
0011:|    0    0    0    0    0    0    0    0    0    1    1    1    1    1    1    1
0012:|    0    0    0    1    1    1    1    1    1    1    1    1    1    1    0    0
0013:|    1    1    1    1    1    1    1    1    0    0    0    0    0    0    0    0
0014:|    1    1    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
Rank 0 coarse tune value selection : 18, 18
18
64
rank 0 coarse = 18
rank 0 fine = 64
00:|    0    0    0    0    0    0    0    1    1    1    1    0
opt_dle value:12
==================================================================
                RX      DQS perbit delay software calibration
==================================================================
1.0-31 bit dq delay value
==================================================================
bit|     0  1  2  3  4  5  6  7  8  9
--------------------------------------
0 |    0 0 0 0 0 0 0 0 0 0
10 |    0 0 0 0 0 0 0 0 0 0
20 |    0 0 0 0 0 0 0 0 0 0
30 |    0 0
--------------------------------------
==================================================================
2.dqs window
x=pass dqs delay value (min~max)center
y=0-7bit DQ of every group
input delay:DQS0 =51 DQS1 = 43 DQS2 =53 DQS3 = 47
==================================================================
bit     DQS0     bit      DQS1     bit     DQS2     bit     DQS3
0  (17~77)47  8  (5~67)36  16  (21~78)49  24  (17~68)42
1  (18~77)47  9  (8~66)37  17  (21~79)50  25  (15~68)41
2  (18~78)48  10  (9~72)40  18  (24~80)52  26  (16~74)45
3  (17~74)45  11  (12~70)41  19  (19~76)47  27  (17~70)43
4  (20~80)50  12  (17~69)43  20  (24~82)53  28  (21~74)47
5  (19~74)46  13  (15~70)42  21  (21~79)50  29  (18~72)45
6  (19~76)47  14  (13~67)40  22  (23~78)50  30  (17~68)42
7  (22~80)51  15  (14~72)43  23  (25~81)53  31  (18~72)45
==================================================================
3.dq delay value last
==================================================================
bit|    0  1  2  3  4  5  6  7  8   9
--------------------------------------
0 |    4 4 3 6 1 5 4 0 7 6
10 |    3 2 0 1 3 0 4 3 1 6
20 |    0 3 3 0 5 6 2 4 0 2
30 |    5 2
==================================================================
*DQIDLY1 = 0x6030404
*DQIDLY2 = 0x40501
*DQIDLY3 = 0x2030607
*DQIDLY4 = 0x30100
*DQIDLY5 = 0x6010304
*DQIDLY6 = 0x30300
*DQIDLY7 = 0x4020605
*DQIDLY8 = 0x2050200
*DRAMC_R0DELDLY = 0x2F352B33

[MEM]CONA:F3A2,conf1:F07486A3
DM4BitMux = 1
DQSO 0 in TX per-bit = 0 <= DQSO 0 in WL = 8
DQSO 1 in TX per-bit = 0 <= DQSO 1 in WL = 4
[Warning] DQSO 2 in TX per-bit = 6 > DQSO 2 in WL = 2
[Warning] DQSO 3 in TX per-bit = 4 > DQSO 3 in WL = 2
Tx DQM dly  = 0x179
Tx DQM dly bit4 = 0x0
DRAMC_DQODLY1=99A97788h
DRAMC_DQODLY2=8879A8AAh
DRAMC_DQODLY3=11202011h
DRAMC_DQODLY4=20003113h
Tx DQ dly bit4 = 0x0
Tx DQS dly = 0x4648
Tx DQS dly bit4 = 0x0
TX Byte0: DQ - 22, DQS - 20. win_sum= 41
TX Byte1: DQ - 25, DQS - 15. win_sum= 39
TX Byte2: DQ - 15, DQS - 24. win_sum= 38
TX Byte3: DQ - 15, DQS - 23. win_sum= 37
DRAMC calibration takes 652973784 CPU cycles

[EMI] DRAMC calibration passed

[MEM] complex R/W mem test pass
0:dram_rank_size:80000000
[Dram_Buffer] dram size:-2147483648
[Dram_Buffer] structure size: 1725560
[Dram_Buffer] MAX_TEE_DRAM_SIZE: 0
Boot from SD Card!!
[PLFM] Init Boot Device: OK(0)

[PART] blksz: 512B
[PART] [0x0000000000000000-0x000000000003FFFF] "PRELOADER" (512 blocks)
[PART] [0x0000000000000000-0x000000000003FFFF] "MBR" (512 blocks)
[PART] [0x0000000000040000-0x00000000000BFFFF] "UBOOT" (1024 blocks)
[PART] [0x00000000000C0000-0x00000000000FFFFF] "CONFIG" (512 blocks)
[PART] [0x0000000000100000-0x000000000013FFFF] "FACTORY" (512 blocks)
[PART] [0x0000000000140000-0x000000000213FFFF] "BOOTIMG" (65536 blocks)
[PART] [0x0000000002140000-0x000000000413FFFF] "RECOVERY" (65536 blocks)
[PART] [0x0000000004140000-0x000000004413FFFF] "ROOTFS" (2097152 blocks)
[PART] [0x0000000044140000-0x000001FFC413FFFF] "USER" (-4194304 blocks)
[platform_vusb_on] PASS
[TOOL] PMIC not dectect usb cable!
[TOOL] <UART> listen  ended, receive size:0!
[TOOL] <UART> wait sync time 150ms->5ms
[TOOL] <UART> receieved data: ()

Device APC domain init setup:

 bootloader load uboot ,the address of uboot is 81E00000
[PART]partition name UBOOT
[PART]partition start block 0x200
[PART]partition size 0x80000
[PART]partition blks 0x400
[PART]partition flags 0x0
[PART]partition name 0x8
[bean] part->startblk(0x200) bdev->blksz(0x200) part->part_id(8) hdr(0xFFB50000)
[BlkDev.c 101 ]partition block size 0x200 ,blks:0x3B8F800
[BlkDev.c 101 ]partition block erase size 0x200

[PART] load "UBOOT" from 0x0000000000050000 (dev) to 0x81E00000 (mem) [SUCCESS]
[PART] load speed: 6232KB/s, 300000 bytes, 47ms
[BT_SD_PG] device info 0x8590 0x8A00 0xCB01 0x102
0:dram_rank_size:80000000
[PLFM] md_type[0] = 0
[PLFM] md_type[1] = 0

[PLFM] boot reason: 0
[PLFM] boot mode: 0
[PLFM] META COM0: 0
[PLFM] <0xFFB7CC10>: 0x0
[PLFM] boot time: 1894ms
[PLFM] DDR reserve mode: enable = 0, success = 0

[BLDR] jump to 0x81E00000
[BLDR] <0x81E00000>=0xEA00000F
[BLDR] <0x81E00004>=0xE59FF014
2

Your uboot is not getting loaded…all messages are from preloader.

Here you find instructions how to manually install uboot: http://www.fw-web.de/dokuwiki/doku.php?id=en/bpi-r2/uboot#update_uboot

btw. Where do you call make uboot/pack? If it is not on bpi-r you need crosscompile…which version of uboot do you use? Official version have build.sh

3

OK, this was also my guess.

On a Debian x86_64 machine

From the output I see that it is cross compiling. $ ./build.sh NOTICE: new build.sh default select BPI-R2-720P and pack all boards supported boards: BPI-R2-720P

BPI-R2-720P configured. Now run `make`
This tool support following building mode(s):
--------------------------------------------------------------------------------
        1. Build all, uboot and kernel and pack to download images.
        2. Build uboot only.
        3. Build kernel only.
        4. kernel configure.
        5. Pack the builds to target download image, this step must execute after u-boot,
           kernel and rootfs build out
        6. update files for SD
        7. Clean all build.
--------------------------------------------------------------------------------
Please choose a mode(1-7): 1

 Now building...

make -C u-boot-mt mt7623_evb_config CROSS_COMPILE=arm-linux-gnueabihf- -j8
make[1]: Entering directory '/home/hashlog/Documents/BPI-R2-bsp/u-boot-mt'
Configuring for mt7623_evb board...
make[1]: Leaving directory '/home/hashlog/Documents/BPI-R2-bsp/u-boot-mt'

I’m using the repository of BPI-SINOVOIP.

commit d94f55022a9192cb181d380b1a6699949a36f30c
Merge: 363f3b1 cb2971d
Author: garywangcn <[email protected]>
Date:   Thu Mar 29 08:13:39 2018 +0800

    Merge pull request #29 from JackZengBpi/master

    Save uboot envs to where it boots from

I tried now again to build u-boot with the build.sh script, but it leads me to the same result:

[PART] load "UBOOT" from 0x0000000000050000 (dev) to 0x81E00000 (mem) [SUCCESS]
[PART] load speed: 6232KB/s, 300000 bytes, 47ms
[BT_SD_PG] device info 0x8590 0x8A00 0xCB01 0x102
0:dram_rank_size:80000000
[PLFM] md_type[0] = 255
[PLFM] md_type[1] = 255

[PLFM] boot reason: 0
[PLFM] boot mode: 0
[PLFM] META COM0: 0
[PLFM] <0xFFB7CC10>: 0x0
[PLFM] boot time: 2922ms
[PLFM] DDR reserve mode: enable = 0, success = 0

[BLDR] jump to 0x81E00000
[BLDR] <0x81E00000>=0xEA00000F
[BLDR] <0x81E00004>=0xE59FF014
4

I don’t know,if this is the right image:

gunzip --stdout out/bpi-r2/100MBBPI-R2-720P-2k.img.gz | sudo dd of=/dev/sdc bs=1k seek=2 count=1022

maybe it is full sd-image and not only the uboot…in that case uboot is already moved to 2k-offset and you copy from wrong position (seek is for output => do not overwrite existing partitiontable on sd,but start reading from offset 0 in “if”)

5

Even if I select Build all, uboot and kernel and pack to download images there is only 1 file in the ./out directory:

$ find ./out -type f
out/bpi-r2/100MB/BPI-R2-720P-2k.img.gz
$ ls -l out/bpi-r2/100MB/BPI-R2-720P-2k.img.gz
-rw-r--r-- 1 user user 161555 Apr 21 07:29 ./out/bpi-r2/100MB/BPI-R2-720P-2k.img.gz

The uncompressed image is exactly 1022k long.

So I tried to not seek to 2k in the beginning, but then there is not even output from the preloader. I will try everything again with your BPI-R2-4.4 repository, maybe then it is working.

6

please don’t look in out-dir…use the file from sd-folder. My repo does not differ in this part

7

Oh, sorry my bad. I recompiled everything and got the following files

$ ls -l ./SD/
drwxr-xr-x 2 user user     4096 Apr 21 07:22 100MB
-rw-r--r-- 1 user user 70980997 Apr 21 07:22 4.4.70-BPI-R2-Kernel-net.tgz
-rw-r--r-- 1 user user 52909913 Apr 21 07:22 4.4.70-BPI-R2-Kernel.tgz
-rw-r--r-- 1 user user   160090 Apr 21 07:22 BOOTLOADER-bpi-r2.tgz
drwxr-xr-x 3 user user     4096 Apr 21 07:22 BPI-BOOT
-rw-r--r-- 1 user user  8335439 Apr 21 07:22 BPI-BOOT-bpi-r2.tgz
drwxr-xr-x 4 user user     4096 Apr 21 07:22 BPI-ROOT

I suspect that the u-boot image is contained in the BOOTLOADER-bpi-r2.tgz file.

$ tar --list -f SD/BOOTLOADER-bpi-r2.tgz
usr/lib/u-boot/bananapi/
usr/lib/u-boot/bananapi/bpi-r2/
usr/lib/u-boot/bananapi/bpi-r2/BPI-R2-720P-2k.img.gz

So I then used that file and followed the commands from the wiki.

$ tar -C ./SD/ -xaf ./SD/BOOTLOADER-bpi-r2.tgz
$ gunzip --stdout ./SD/usr/lib/u-boot/bananapi/bpi-r2/BPI-R2-720P-2k.img.gz | dd bs=2k seek=2 count=1022 of=/dev/disk3

Unfortunately, same result as before

8

Bootloader-tar is right…can you test please use gunzip without --stdout?

Uboot is built without errors?

9

I attached the complete output of the build process. There is not a single warning nor error.

$ ls -l ./SD/
drwxr-xr-x 2 user user     4096 Apr 22 09:27 100MB
-rw-r--r-- 1 user user 70972376 Apr 22 09:27 4.4.70-BPI-R2-Kernel-net.tgz
-rw-r--r-- 1 user user 52914535 Apr 22 09:27 4.4.70-BPI-R2-Kernel.tgz
-rw-r--r-- 1 user user   160285 Apr 22 09:27 BOOTLOADER-bpi-r2.tgz
drwxr-xr-x 3 user user     4096 Apr 22 09:27 BPI-BOOT
-rw-r--r-- 1 user user  8335424 Apr 22 09:27 BPI-BOOT-bpi-r2.tgz
drwxr-xr-x 4 user user     4096 Apr 22 09:27 BPI-ROOT

$ tar -C ./SD/ -xzvf ./SD/BOOTLOADER-bpi-r2.tgz
usr/lib/u-boot/bananapi/
usr/lib/u-boot/bananapi/bpi-r2/
usr/lib/u-boot/bananapi/bpi-r2/BPI-R2-720P-2k.img.gz

$ gunzip ./SD/usr/lib/u-boot/bananapi/bpi-r2/BPI-R2-720P-2k.img.gz
./SD/usr/lib/u-boot/bananapi/bpi-r2/BPI-R2-720P-2k.img.gz:       84.6% -- replaced with ./SD/usr/lib/u-boot/bananapi/bpi-r2/BPI-R2-720P-2k.img

$ ls -l ./SD/usr/lib/u-boot/bananapi/bpi-r2/
-rw-r--r-- 1 hashlog hashlog 1046528 Apr 22 09:27 BPI-R2-720P-2k.img

$ dd if=./SD/usr/lib/u-boot/bananapi/bpi-r2/BPI-R2-720P-2k.img bs=1k seek=2 count=1022 of=/dev/disk3

Unfortunately, same result as before :frowning:

output.txt.gz (53,0 KB)

10

Is this really the right device? Devicename looks strange.

You got no warnings because the code is already built (to o-files) and is only linked to target-binaries. that means there are no errors before…you can make make clean to see warnings again (full compile) but this does not solve your problem…have you tried unmodified uboot?

11

Yes. I’m using dd from a macbook, which is assigning /dev/disk# as identifier.

Anyway, cleaned everything, rebuild everything and attached the output. Now there are warnings, but no error. Still no u-boot after copying it to the sd card.

What do you mean with “unmodified uboot”? The one included in the ubuntu-image is working. I did not modify anything in u-boot repository from SINOVOIP yet. I just compiled the image and copied it to the sd card.

In the meantime I downloaded the bootloader from you google drive and copied it to the sd card. With your bootloader there is no problem. Did you cross-compile or compile it natively on the bpi-r2? Am I maybe using the wrong cross-compiler arm-linux-gnueabihf-gcc?

log.txt.gz (56,8 KB)

12

I used crosscompiler gnueabihf like mentioned in the documentations. Maybe anything in repo has changed…i remember a change of any start-address,but think it was lede-bootloader…

Have you installed u-boot-tools (mkimage)? Normally it will result in an error if not installed

@garywang have you an idea?

13

image

We can user BPI-Tool or RAW command in uboot to update uboot itself.

14

Is it possible that you have no preloader on your sdcard (only uboot) and on emmc only preloader (no uboot)?

Then system will look on sdcard for preloader,does not find it,looks on emmc load preloader,but there is no uboot…

15

Yes, u-boot-tools are installed

Wouldn’t that write u-boot to the integrated emmc? This is not what I’m trying to achieve. I want to build u-boot from the repository on my own and load it to the SD card. Then boot the bananpi from the self-compiled u-boot.

I didn’t try to write anything to the emmc yet. So I’m pretty sure it should be empty. Just to really make sure I zeroed (dd if=/dev/zero ..) the sd card and turned on the bpi-r2. Nothing happened. I think the emmc is empty.

16

@frank-w I see in your post “How to extend the uboot menu” that apparently you can compile and use your own uboot. Could you please post every step (from cloning the git repository, until insterting the SD card into the bpi-r2) here?

17

basicly there are no more steps as described in my wiki

  • git clone https://github.com/frank-w/BPI-R2-4.4.git
  • cd BPI-R2-4.4
  • ./build.sh => 1
  • gunzip SD/100MB/BPI-R2-720P-2k.img.gz
  • sudo dd if=SD/100MB/BPI-R2-720P-2k.img of=/dev/sdb bs=1k seek=2 count=1022
  • sync + umount automounted partitions
  • remove card and insert in r2
  • boot r2

i looked into how the BPI-R2-720P-2k.img was created…preloader is included on sdcard preloader (preloader_iotg7623Np1_emmc.bin) is at 0x800 and uboot (uboot.bin) on 0x50000 (you can dd an 1MB-image from your card and look with bless or similar hexeditor)

i don’t know if there must be an partition defined…if you use an empty card…you can use my partition-scheme to test it out: http://www.fw-web.de/dokuwiki/doku.php?id=en:bpi-r2:storage#manual_copy_of_os

18

Since it was still not working I changed my plans. I took my old clamshell pc, installed linux, and did all your steps and it worked :ok_man: I just hadded to add the section from 0-2k from the ubuntu image, in order to be able to boot. I guess there is some kind of preloader on it to initialize the CPU and the memory.

dd if=ubuntu.img bs=1k count=2 of=/dev/sdb

I attached the part that I used for the sd card (0-2k). Do you have any idea what this is?

I still have no idea what went wrong in my previous tries. I’m still investigating and if I find something I will report it.

header_0-2k.img (2 KB)

19

maybe the first 512kB are needed to boot see https://en.wikipedia.org/wiki/Master_boot_record

the first 10 bytes containing a magic string “SDMMC_BOOT” followed by 10Bytes (00 00 01 00 00 00 00 02 00 00) i don’t know (maybe position of preloader/uboot to jump to) followed by many FF (fill-bytes??). On byte 440 (1b8h) there is the “32-bit disk signature” followed by 0000h (for rw-state). After that Partition-Table starts (MBR 4x16byte) followed by MBR end-marker 55AAh

so i assume that it is enough copy the first 20 bytes to get SDcard to boot (partitiontable should not be involved in boot-process before uboot).

also some infos about that area of the sd/emmc: Boot process\FreeBSD porting

i have wrote down the steps after creating bootable emmc with only these steps, but emmc has bootloader in separate partition (boot0-block) so maybe in SD-Card there is more needed. in my image i used original image with erased partitions.

btw. preloader is before uboot >=2k

20

Unfortunately it is not. There are 32 bytes after the MBR (starting at 0x200) that are required for booting. Let’s refer to it as BRLYT

$ dd if=2017-09-04-ubuntu-16.04-mate-desktop-bpi-r2-sd-emmc-v1.2.0.img bs=1 skip=512 count=32 | xxd
32+0 records in
32+0 records out
32 bytes copied, 0.000135552 s, 236 kB/s
00000000: 4252 4c59 5400 0000 0100 0000 0008 0000  BRLYT...........
00000010: 0008 0000 4242 4242 0800 0100 0008 0000  ....BBBB........
00000020: 0008 0000 0100 0000 0000 0000 0000 0000  ................

Putting only those 3 parts (SDMMC_BOOT, BRLYT, uBoot) to the SD card is sufficient to make it boot. There is no need for a partition table.

# copy SDMMC_BOOT
$ dd of=/dev/sdb bs=1 count=20 if=2017-09-04-ubuntu-16.04-mate-desktop-bpi-r2-sd-emmc-v1.2.0.img 
# copy BRLYT
$ dd of=/dev/sdb bs=1 seek=512 skip=512 count=48 if=2017-09-04-ubuntu-16.04-mate-desktop-bpi-r2-sd-emmc-v1.2.0.img 
# copy uboot
$ dd of=/dev/sdb bs=1k seek=2 count=1022 if=./SD/100MB/BPI-R2-720P-2k.img

Indeed those are fill-bytes. I replaced them with 0x00 and it’s still loading uboot.

I can also confirm, that the partition table is not part of the boot process. My SD has no partition table on (i zeroed everythin) and it is still loading uboot.

Questions that are still open for me:

  1. What do the bytes from 0-20 (SDMMC) do?
  2. What is the BRLYT part?
  3. Where are the addresses stored to jump from the preloader (SDMMC) to BRLYT and from BRLYT to 0x800 (uBoot)?
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