PORT G (WiFi-Port) acces in Bare Metal coding


(Markus Neubauer) #1

Hello!

I don’t know how far the Bare-Metal-group has established here but I want to give it a try. I’m programming a BPI M2Z that needs a very specific OS (so bare-metal is neccessary). Everything is working so far (DRAM, DMA, Timers, GIC and even CSI is on the way) but the WiFi-module does not work at all.

Well, I found out, that it’s not the WiFi-module that causes troubles. I’ve measured the SDIO pins on the AP6212 with my oscilloscope and found out, that the voltage level does not change. I went further and configured Port G (which is attached to the SDIO1 interface) as an output and generated a simple clock signal via software (~2.5 MHz). The clock signal however is not applied to the pin as it should be according to the schematics. To make sure that I did not make any mistake, I’ve applied the signal to one pin of the 40-pin header and I could measure my 2.5 MHz signal.

So I’ve tried to put just LOW or HIGH-level on Port G but I could not measure any change. Is there anything I’ve missed with H2+/BPI-M2Z/Port G? Any hidden registers you know about that I’ve missed?

Following registers have been handled for that issue:

  • CCU: De-assert PIO reset
  • CCU: Enable PIO clock gating
  • PG_CFG0: for PG0…7, this is the SDIO-interface for WiFi
  • PG_DAT: for testing with my custom clock signal and fixed levels

In case I’ve hit the wrong community, do you know someone that could help me with my issue? I’ve also checked all of the awesome examples made by dwelch67.

Kind regards Markus