@frank-w: I’m looking at the bl1 -> bl2 sequence. I’ve noticed that for R3 you do not write any header: It is commented out…
Does the R3 not require any header? Is it enough the set legacy boot bit of the bl2 partition in GPT table?
Before you mentioned this as the start of sector 0:
Which does seem like a header. Or did it turn out this was not necessary?
The line you mention was the binary gpt i flashed before (created by python2 script in mtk-code).
It is enough creating the gpt with bootable bl2 and writing the right bl2 binary (there is a bin and an img file) there
On the BPI-R3, there is a small side affect when only switching switch D down (and leaving the rest up).
In this combination, it is possible to load the bl2 from sector 34 an up on the EMMC, from /dev/mmcblk0. The difference is that mmcblk0boot0 is not being used. bl2 gets written together with the rest of the image.
This way the entire image needs only written to 1 device (similar to SDMMC).
In the makefile, change all declarations:
BROM_HEADER_TYPE :=
to
BROM_HEADER_TYPE ?=
and then build an emmc atf image, passing BOOT_DEVICE=emmc and BROM_HEADER_TYPE=sdmmc on the make command line.
On the BPI-R3, add new spi nand Flash(QE bit set 0 off default). but NMBM don’t support, all block be sacnned bad block, also i add spim driver .C file’s .init struct setting, not work again. Could you take me how to fix it?
startup err log:
…
spi nand driver file’s init struct:
NMBM LA data(By Acute logic analyzer): (That show nmbm set ecc off, and not set QE bit =1)
QE bit by spec.:
spi nand driver files: xtxtech.c (5.6 KB)
I get it, Add “arm-trusted-firmware/drivers/mtd/nand/spi_nand.c” new line 127,Flash ID, then QE enble set.
But one new conundrum has emerged, Error log stop that “NOTICE: NMBM has been initialized in read-only mode”
is there some ATF/uboot-code for mt7988?
in progress. i’m preparing the atf code now.
Hi, i use "snfi" config for uboot & atf, but dont working, is my configs error?<br/>
<br/>
<b>err info(powerup from spim, flash ecc config):</b><br/>
<br/>
[2023/7/10 10:50:07] F0: 102B 0000<br/>
[2023/7/10 10:50:07] FA: 1040 0000<br/>
[2023/7/10 10:50:07] FA: 1040 0000 [0200]<br/>
[2023/7/10 10:50:07] F9: 0000 0000<br/>
[2023/7/10 10:50:07] V0: 0000 0000 [0001]<br/>
[2023/7/10 10:50:07] 00: 0000 0000<br/>
[2023/7/10 10:50:07] BP: 2400 0041 [0000]<br/>
[2023/7/10 10:50:07] G0: 1190 0000<br/>
[2023/7/10 10:50:07] EC: 0000 0000 [1000]<br/>
[2023/7/10 10:50:07] T0: 0000 021E [010F]<br/>
[2023/7/10 10:50:07] Jump to BL<br/>
[2023/7/10 10:50:07] <br/>
[2023/7/10 10:50:07] NOTICE: BL2: v2.7(release):v2.4-rc0-2957-g753934848-dirty<br/>
[2023/7/10 10:50:07] NOTICE: BL2: Built : 10:15:50, Jul 10 2023<br/>
[2023/7/10 10:50:07] NOTICE: WDT: disabled<br/>
[2023/7/10 10:50:08] NOTICE: CPU: MT7986 (2000MHz)<br/>
[2023/7/10 10:50:08] NOTICE: EMI: Using DDR4 settings<br/>
[2023/7/10 10:50:08] NOTICE: EMI: Detected DRAM size: 2048MB<br/>
[2023/7/10 10:50:08] NOTICE: EMI: complex R/W mem test passed<br/>
[2023/7/10 10:50:08] NOTICE: SPI_NAND parses attributes from parameter page.<br/>
[2023/7/10 10:50:08] NOTICE: SPI_NAND Detected ID 0xef<br/>
[2023/7/10 10:50:08] NOTICE: Page size 2048, Block size 131072, size 134217728<br/>
[2023/7/10 10:50:08] NOTICE: Initializing NMBM ...<br/>
[2023/7/10 10:50:10] NOTICE: NMBM management region starts at block 960 [0x07800000]<br/>
[2023/7/10 10:50:10] NOTICE: NMBM has been initialized in read-only mode<br/>
[2023/7/10 10:50:11] NOTICE: BL2: Booting BL31<br/>
[2023/7/10 10:50:11] NOTICE: BL31: v2.7(release):v2.4-rc0-2957-g753934848-dirty<br/>
[2023/7/10 10:50:11] NOTICE: BL31: Built : 10:15:51, Jul 10 2023<br/>
[2023/7/10 10:50:11] <br/>
[2023/7/10 10:50:11] <br/>
[2023/7/10 10:50:11] U-Boot 2022.10-rc3-10199-gcac27537e1-dirty (Jul 10 2023 - 10:14:58 +0800)<br/>
[2023/7/10 10:50:11] <br/>
[2023/7/10 10:50:11] CPU: MediaTek MT7986<br/>
[2023/7/10 10:50:11] Model: mt7986-rfb<br/>
[2023/7/10 10:50:11] DRAM: 2 GiB<br/>
[2023/7/10 10:50:11] Core: 47 devices, 18 uclasses, devicetree: separate<br/>
[2023/7/10 10:50:11] <br/>
[2023/7/10 10:50:11] Initializing NMBM ...<br/>
[2023/7/10 10:50:11] spi-nand: spi_nand spi_nand@1: Winbond SPI NAND was found.<br/>
[2023/7/10 10:50:11] spi-nand: spi_nand spi_nand@1: 128 MiB, block size: 128 KiB, page size: 2048, OOB size: 64<br/>
[2023/7/10 10:50:11] Could not find a valid device for nmbm0<br/>
[2023/7/10 10:50:12] NMBM management region starts at block 960 [0x07800000]<br/>
[2023/7/10 10:50:12] Signature has been written to block 1023 [0x07fe0000]<br/>
[2023/7/10 10:50:12] Main info table has been written to block 960<br/>
[2023/7/10 10:50:12] Backup info table has been written to block 963<br/>
[2023/7/10 10:50:12] NMBM has been successfully created<br/>
[2023/7/10 10:50:12] <br/>
[2023/7/10 10:50:12] MMC: mmc@11230000: 0<br/>
[2023/7/10 10:50:12] Loading Environment from MTD... *** Warning - bad CRC, using default environment<br/>
[2023/7/10 10:50:12] <br/>
[2023/7/10 10:50:12] In: serial@11002000<br/>
[2023/7/10 10:50:12] Out: serial@11002000<br/>
[2023/7/10 10:50:12] Err: serial@11002000<br/>
[2023/7/10 10:50:13] Net: <br/>
[2023/7/10 10:50:13] Warning: ethernet@15100000 (eth0) using random MAC address - ba:4d:d1:8b:8b:19<br/>
[2023/7/10 10:50:13] eth0: ethernet@15100000<br/>
[2023/7/10 10:50:17] *** U-Boot Boot Menu ***<br/>
1. Startup system (Default)<br/>
2. Upgrade firmware<br/>
3. Upgrade ATF BL2<br/>
4. Upgrade ATF FIP<br/>
5. Upgrade single image<br/>
6. Load image<br/>
0. U-Boot console<br/>
Press UP/DOWN to move, ENTER to select, ESC/CTRL+C to quit<br/>
[2023/7/10 10:50:17] *** Upgrading ATF BL2 ***<br/>
[2023/7/10 10:50:17] <br/>
[2023/7/10 10:50:17] Available load methods:<br/>
[2023/7/10 10:50:17] 0 - TFTP client (Default)<br/>
[2023/7/10 10:50:17] 1 - Xmodem<br/>
[2023/7/10 10:50:17] 2 - Ymodem<br/>
[2023/7/10 10:50:17] 3 - Kermit<br/>
[2023/7/10 10:50:17] 4 - S-Record<br/>
[2023/7/10 10:50:17] <br/>
[2023/7/10 10:50:19] Select (enter for default): <br/>
[2023/7/10 10:50:19] <br/>
[2023/7/10 10:50:20] Input U-Boot's IP address: 192.168.1.1<br/>
[2023/7/10 10:50:22] Input TFTP server's IP address: 192.168.1.254<br/>
[2023/7/10 10:50:23] Input IP netmask: 255.255.255.0<br/>
<b>[2023/7/10 10:50:38] Input file name: bl2_snfi_20230710.img</b><br/>
[2023/7/10 10:50:38] <br/>
[2023/7/10 10:50:38] Using ethernet@15100000 device<br/>
[2023/7/10 10:50:38] TFTP from server 192.168.1.254; our IP address is 192.168.1.1<br/>
[2023/7/10 10:50:38] Filename 'bl2_snfi_20230710.img'.<br/>
[2023/7/10 10:50:38] Load address: 0x46000000<br/>
[2023/7/10 10:50:38] Loading: ################<br/>
[2023/7/10 10:50:38] 1.2 MiB/s<br/>
[2023/7/10 10:50:38] done<br/>
[2023/7/10 10:50:38] Bytes transferred = 225184 (36fa0 hex)<br/>
[2023/7/10 10:50:38] Saving Environment to MTD... Erasing on MTD device 'u-boot-env'... OK<br/>
[2023/7/10 10:50:38] Writing to MTD device 'u-boot-env'... OK<br/>
[2023/7/10 10:50:38] OK<br/>
[2023/7/10 10:50:38] <br/>
[2023/7/10 10:50:38] *** Loaded 225184 (0x36fa0) bytes at 0x46000000 ***<br/>
[2023/7/10 10:50:38] <br/>
[2023/7/10 10:50:38] Erasing 'bl2' from 0x0, size 0x40000 ... OK<br/>
[2023/7/10 10:50:38] Writing 'bl2' from 0x46000000 to 0x0, size 0x36fa0 ... OK<br/>
[2023/7/10 10:50:38] <br/>
[2023/7/10 10:50:38] *** ATF BL2 upgrade completed! ***<br/>
[2023/7/10 10:50:42] MT7986> <br/>
[2023/7/10 10:50:42] MT7986> <br/>
[2023/7/10 10:50:43] MT7986> <br/>
<b>[2023/7/10 10:50:48] MT7986> mtkautoboot </b><br/>
[2023/7/10 10:50:50] *** U-Boot Boot Menu ***<br/>
1. Startup system (Default)<br/>
2. Upgrade firmware<br/>
3. Upgrade ATF BL2<br/>
4. Upgrade ATF FIP<br/>
5. Upgrade single image<br/>
6. Load image<br/>
0. U-Boot console<br/>
Press UP/DOWN to move, ENTER to select, ESC/CTRL+C to quit<br/>
[2023/7/10 10:50:50] *** Upgrading ATF FIP ***<br/>
[2023/7/10 10:50:50] <br/>
[2023/7/10 10:50:50] Available load methods:<br/>
[2023/7/10 10:50:50] 0 - TFTP client (Default)<br/>
[2023/7/10 10:50:50] 1 - Xmodem<br/>
[2023/7/10 10:50:50] 2 - Ymodem<br/>
[2023/7/10 10:50:50] 3 - Kermit<br/>
[2023/7/10 10:50:50] 4 - S-Record<br/>
[2023/7/10 10:50:50] <br/>
[2023/7/10 10:50:51] Select (enter for default): <br/>
[2023/7/10 10:50:51] <br/>
[2023/7/10 10:50:51] Input U-Boot's IP address: 192.168.1.1<br/>
[2023/7/10 10:50:52] Input TFTP server's IP address: 192.168.1.254<br/>
[2023/7/10 10:50:53] Input IP netmask: 255.255.255.0<br/>
<b>[2023/7/10 10:51:07] Input file name: fip_snfi_20230710.bin</b><br/>
[2023/7/10 10:51:07] <br/>
[2023/7/10 10:51:07] Using ethernet@15100000 device<br/>
[2023/7/10 10:51:07] TFTP from server 192.168.1.254; our IP address is 192.168.1.1<br/>
[2023/7/10 10:51:07] Filename 'fip_snfi_20230710.bin'.<br/>
[2023/7/10 10:51:07] Load address: 0x46000000<br/>
[2023/7/10 10:51:22] Loading: #T T ##################################################<br/>
[2023/7/10 10:51:22] 49.8 KiB/s<br/>
[2023/7/10 10:51:22] done<br/>
[2023/7/10 10:51:22] Bytes transferred = 747273 (b6709 hex)<br/>
[2023/7/10 10:51:22] Saving Environment to MTD... Erasing on MTD device 'u-boot-env'... OK<br/>
[2023/7/10 10:51:22] Writing to MTD device 'u-boot-env'... OK<br/>
[2023/7/10 10:51:22] OK<br/>
[2023/7/10 10:51:22] <br/>
[2023/7/10 10:51:22] *** Loaded 747273 (0xb6709) bytes at 0x46000000 ***<br/>
[2023/7/10 10:51:22] <br/>
[2023/7/10 10:51:22] Erasing 'fip' from 0x380000, size 0xc0000 ... OK<br/>
[2023/7/10 10:51:22] Writing 'fip' from 0x46000000 to 0x380000, size 0xb6709 ... OK<br/>
[2023/7/10 10:51:22] <br/>
[2023/7/10 10:51:22] *** ATF FIP upgrade completed! ***<br/>
[2023/7/10 10:51:22] <br/>
[2023/7/10 10:51:22] Erasing 'environment' from 0x100000, size 0x20000 ... OK<br/>
<b>[2023/7/10 10:51:31] MT7986> reset</b><br/>
[2023/7/10 10:51:31] resetting ...<br/>
[2023/7/10 10:51:31] <br/>
[2023/7/10 10:51:31] F0: 102B 0000<br/>
[2023/7/10 10:51:31] FA: 1040 0000<br/>
[2023/7/10 10:51:31] FA: 1040 0000 [0200]<br/>
[2023/7/10 10:51:31] F9: 3903 0041<br/>
[2023/7/10 10:51:31] F3: 1001 0000 [0200]<br/>
[2023/7/10 10:51:31] F3: 1001 0000<br/>
[2023/7/10 10:51:31] F6: 102C 0000<br/>
[2023/7/10 10:51:31] F5: 1026 0000<br/>
[2023/7/10 10:51:31] 00: 1005 0000<br/>
[2023/7/10 10:51:31] FA: 1040 0000<br/>
[2023/7/10 10:51:31] FA: 1040 0000 [0200]<br/>
[2023/7/10 10:51:31] F9: 3903 0041<br/>
[2023/7/10 10:51:31] F3: 1001 0000 [0200]<br/>
[2023/7/10 10:51:31] F3: 1001 0000<br/>
[2023/7/10 10:51:31] F6: 102C 0000<br/>
[2023/7/10 10:51:31] 01: 102A 0001<br/>
[2023/7/10 10:51:31] 02: 1005 0000<br/>
[2023/7/10 10:51:31] BP: 2000 00C0 [0001]<br/>
[2023/7/10 10:51:31] EC: 0000 0000 [1000]<br/>
[2023/7/10 10:51:31] T0: 0000 00BA [010F]<br/>
<b>[2023/7/10 10:51:31] System halt!</b><br/>
[2023/7/10 10:51:31] <br/>
<br><br/>
<br><br/>
<b>compile process：</b><br><br/>
for ATF:
make clean
make CROSS_COMPILE="~/BPI-R3-OPENWRT-V21.02.3-main/staging_dir/toolchain-aarch64_cortex-a53_gcc-8.4.0_musl/bin/aarch64-openwrt-linux-" -f Makefile PLAT=“mt7986” BOOT_DEVICE=“snand” BL33="~/mt7986av_dir_home/uboot_files/u-boot-snfi-xtxtect-"$(date +’%Y%m%d’)".bin" NAND_TYPE=“hsm:2k+128” NMBM=“1” DRAM_USE_DDR4=“1” all fip
for UBOOT:
make clean
make mt7986_snfi_nand_rfb_defconfig
make CROSS_COMPILE="~/BPI-R3-OPhttps://forum.banana-pi.org/t/tutorial-build-customize-and-use-mediatek-open-source-u-boot-and-atf/13785/38ENWRT-V21.02.3-main/staging_dir/toolchain-aarch64_cortex-a53_gcc-8.4.0_musl/bin/aarch64-openwrt-linux-"
Which board do you use? BPI-R3 has no snfi…“only” spim-nand and nor
Thx. i used BPI-R3 v1.1, i testing mtk soc ecc now, that i try use ‘flash hw ecc’s atf&boot’ + ‘mtk soc ecc’s kernel&rootfs’ .
SNFI and SPIM-NAND uses different controllers and pins. You can’t use SNFI BL2 on the SPIM-NAND boot path.
Thx. I’m confusing SNFI and NFI, and boot be supperted NFI for spi-nand? (If be supperted NFI, How to config？)
I use openwrt-v21.02.3 to built image， but startup log not show any ‘mtk-snand’ 's infomation，also “MediaTek SPI NAND flash controller driver” be selected.
openwrt v21.02.3 kernel menuconfig GUI:
NFI stands for NAND Flash Interface.
NFI controller can support Parallel NAND, SPI-NAND or both.
When NFI controller is interfacing with SPI-NAND, it’s called Serial NAND Flash Interface, i.e. SNFI.
The NFI controller uses its own HW ECC engine, for both Parallel NAND and SPI-NAND.
The On-die ECC engine of SPI-NAND will not be used by SNFI.
In kernel, driver named NFI only interfaces with Parallel NAND:
drivers/mtd/nand/raw/mtk_nand.c
There’s no driver for SNFI in mainline kernel.
The official driver is mtk-snand.
Starting from filogc MT7986, a new SPI master controller was added and it supports spi-mem type QSPI (called SPIM).
When connecting SPI-NAND to this interface, it will be driven by kernel’s standard spi-nand framework.
Since the kernel’s standard spi-nand framework is used, it will enable the On-die ECC, and nothing to do with SNFI.
This boot option is called SPIM-NAND.
BPI-R3 supports booting from SD/eMMC/SPI-NOR/SPIM-NAND, but no SNFI.
SD/eMMC share with one MMC controller, and SPI-NOR/SPIM-NAND/SNFI have their own controller interface.
When the bootstrap switch is set to boot from SPIM-NAND, the bootrom will initialize the SPIM controller and corresponding spi-nand driver using on-die ECC.
Since the page layout of SNFI is different from which of on-die ECC, you can’t connect a SPI-NAND with SNFI page layout to the SPIM-NAND interface. The bootrom won’t recognize it.
Thanks for the answer，I got it.
please do not use current ATF-code as i identified a memory-issue (only seen while booting linux, boot till uboot seems fine) with the new ATF-code (common BL2 code for different SoC).
branches from last year should work, but not from (at least july) this year
the issue causes SIGFAULT/SIGSEV in linux userspace at different positions while bootup…mostly before loginprompt.
if using code in my uboot-repo mtk-atf is good (but not support mt7988/bpi-r4),mtk-atf-r4 is broken
I’ve found the cause and suggested a fix here:
There is a driver for SNFI in mainline Linux. Afaik MT7981 and MT7988 may not yet be supported, but up to MT7986 it should be fine:
I forgot that.
But we’re not going to use SNFI in future platforms.
Oh, that’s sad. But on MT7981 and MT7988 it is still present, right?
I liked the approach of having the bare SLC NAND cells on an SPI connected IC, and have BCH (which is usually better and faster than any on-die ECC) carried out by the SoC…
Yes. And SNFI may still exists in future platform, but no actual reference design released.
One of the major reason that we retire SNFI is the fact that it increases the difficulty for factory production. The original rom image must be converted by a dedicated BCH tool to add parity code before it can be programmed into flash. Not all manufacturers can handle this correctly.
BTW, I also like this approach…