The nor and nand dts are device tree overlays. These are compuled separately (see my build.sh) and the binaries added to fit. From uboot you can set bootconf to e.g. â#conf-sd-norâ before calling newboot. Iâm trying to add automatic selection/generation of bootconf. Nor had some annoying messages which i wanted to fix first.
And you will not see them with fdisk. They are mapped to mtd partitionsâŠyou should see them with cat /proc/partitions and a message of the driver in dmesg
Hy again me ^^.
Thank you for nand/nor. I use nand thanks to your help.
Like i said, i tried to put rottfs in the fit (itâs the best way for my project i think).
The problem :
When i let the line load = <0x47000000>; on the fit config, i have this error :
Press UP/DOWN to move, ENTER to select, ESC/CTRL+C to quit
## Error: "initrd" not defined
fit=diagbox.itb
75430704 bytes read in 7555 ms (9.5 MiB/s)
## Loading kernel from FIT Image at 46000000 ...
Using 'conf-1' configuration
Trying 'kernel' kernel subimage
Description: Kernel
Type: Kernel Image
Compression: gzip compressed
Data Start: 0x460000c0
Data Size: 9023926 Bytes = 8.6 MiB
Architecture: AArch64
OS: Linux
Load Address: 0x44000000
Entry Point: 0x44000000
Hash algo: sha1
Hash value: db19bf77644b49dd92e368d44d550ee7622c4975
Verifying Hash Integrity ... sha1+ OK
## Loading fdt from FIT Image at 46000000 ...
Using 'conf-1' configuration
Trying 'fdt' fdt subimage
Description: Flattened Device Tree blob
Type: Flat Device Tree
Compression: uncompressed
Data Start: 0x4689b36c
Data Size: 19100 Bytes = 18.7 KiB
Architecture: AArch64
Load Address: 0x47000000
Hash algo: sha1
Hash value: 2fba374f801b81c839aa55c2f3c7182b44d4a4f3
Verifying Hash Integrity ... sha1+ OK
Error: fdt overwritten
Could not find a valid device tree
RescueOS>
When i delete the line `load = <0x47000000>; it boots randomly, sometimes itâs ok and sometime no.
Here the uEnv_r3.txt of uboot
board=bpi-r3
device=mmc
partition=0:5
bootenv=uEnv.txt
bootdevice=sd
fit=bpi-r3.itb
#bootconf="#conf-2"
#initrd=rootfs.cpio.zst
loadaddr=0x46000000
kaddr=0x46000000
rdaddr=0x48000000
root=/dev/mmcblk0p6 rootfstype=ext4 rootwait
console=ttyS0,115200n1 earlycon=uart8250,mmio32,0x11002000
bootopts=debug=7
checkenv=test -e ${device} ${partition} ${bootenv}
loadenvfile=if fatload ${device} ${partition} ${loadaddr} ${bootenv};then env import -t ${loadaddr} ${filesize};else echo "fatload (${bootenv}) failed";fi
loadenv=if run checkenv;then run loadenvfile;fi
resetenv=env default -a;printenv;
loadkernel=fatload $device $partition $kaddr ${kernel}
buildargs=setenv bootargs "board=${board} earlycon=uart8250,mmio32,0x11002000 ${bootopts} root=${root}"
#console=${console}
useusb=if usb info; then usb reset;else usb start;fi; setenv device usb;setenv partition 0:1;ls ${device} ${partition}
useinitrd=setenv root "/dev/ram0 rw";setenv bootopts "${bootopts} initrd=${rdaddr},20M";fatload ${device} ${partition} ${rdaddr} ${initrd};
checkrd=if printenv initrd;then run useinitrd;fi
newboot=run checkrd; run buildargs;if printenv fit;then setenv kernel ${fit};if run loadkernel; then bootm ${kaddr}${bootconf}; fi;fi;
And here the fit configuration :
/dts-v1/;
/ {
description = "Kernel et dtb pour RescueOS";
#address-cells = <1>;
images {
kernel {
description = "Kernel";
data = /incbin/("Image.gz");
type = "kernel";
arch = "arm64";
os = "linux";
compression = "gzip";
load = <0x44000000>;
entry = <0x44000000>;
hash-1 {
algo = "sha1";
};
};
fdt {
description = "Flattened Device Tree blob";
data = /incbin/("diagbox.dtb");
type = "flat_dt";
arch = "arm64";
load = <0x47000000>;
compression = "none";
hash-1 {
algo = "sha1";
};
};
fdt-nand{
data = /incbin/("diagbox-nand.dtbo");
type = "flat_dt";
arch = "arm64";
};
};
ramdisk {
description = "ramdisk";
data = /incbin/("rootfs.cpio.gz");
type = "ramdisk";
arch = "arm64";
os = "linux";
compression = "gzip";
hash-1 {
algo = "sha1";
};
};
configurations {
default = "conf-1";
conf-1 {
description = "Configuration";
kernel = "kernel";
fdt = "fdt", "fdt-nand";
ramdisk = "ramdisk";
hash-1 {
algo = "sha1";
};
};
};
};
I think itâs a problem of load address.
Have you an Idea?
Thank by advance
Loadaddr for fdt is needed when applying dto,so let it in.
Try adding loadaddr to ramdisk with value 0x48000000 ( rdaddr from my env)
thanks to answer me again ^^
Same problem 
I just think, i have modify my gpt conf like this :
{
"bl2" : {
"start": 1024,
"end" : 8191,
"attributes": 4,
"uuid" : "{19a4763a-6b19-4a4b-a0c4-8cc34f4c2b8a}"
},
"u-boot-env" : {
"start": 8192,
"end" : 9215,
"uuid" : "{19a4763a-6b19-4a4b-a0c4-8cc34f4c2ab9}"
},
"factory" : {
"start": 9216,
"end" : 13311,
"uuid" : "{8142c1b2-1697-41d9-b1bf-a88d76c7213f}"
},
"fip": {
"start": 13312,
"end" : 17407,
"uuid" : "{18de6587-4f17-4e08-a6c9-d9d3d424f4c5}"
},
"kernel" : {
"start": 17408,
"end" : 293888,
"uuid" : "{971f7556-ef1a-44cd-8b28-0cf8100b9c7e}"
},
"rootfs" : {
"start": 293889,
"end" : 1342465,
"uuid" : "{309a3e76-270b-41b2-b5d5-ed8154e7542b}"
},
"data" : {
"start": 1342466,
"end" : 6585346,
"uuid" : "{309a3e76-270b-41b2-b5d5-ed8154e7542b}"
}
}
Can it have an Influence on the fit?
I prefer to integrate the rootfs in the fit because my Project has two rootfs : alpha and beta. They can share same kernel and dts, so same fit without integrating rootfs i the fit.
But i donât kno how to force uboot to use alpha or beta rootfs.
Before bananapi r3, i used extlinux.conf, where i modify the rootfs before reboot.
I think i can do somthing with this :
root=/dev/mmcblk0p6 rootfstype=ext4 rootwait
console=ttyS0,115200n1 earlycon=uart8250,mmio32,0x11002000
bootopts=debug=7
I thought to modifiy a files in partition of boot (0:5) where which would be informed the rootfs wanted. But i donât find how to read a files in uboot.
You can have 2 rootfs partitions or 2 separate initrd files. Gpt is not cause of this error. Basicly you have to calculate the memory structure to make sure nothing gets overridden. Maybe it works with separate initrd,when fit itself is smaller.
With my uboot you can do it Like this
setenv initrd rootfs.cpio.zst
setenv fit bpi-r3-sfp-no-rd.itb
setenv bootconf "#conf-2"
run newboot
initrd and fit are filenames and will be loaded from same location (mmc 0:5 by default).
For rootfs partition you can set root variable to other value before calling newboot (calls buildargs which concatenates root and other vars to bootargs)
You can create uEnv.txt in boot-partition to do this. My uboot loads this file and overwrites builtin env with this before showing menu
Hy,
Sorry to thank you only now, a lot of work and the head in the Bananapi R3 
I play with th uEnv.txt to select the rootfs. All i wanted.
So, I need you again and again
Now i try to install a bl2 and/or fip on the nand to boot since the nand.
Now, i see my nand, thanks to you :
# cat /proc/mtd
dev: size erasesize name
mtd0: 07a80000 00020000 "ubi"
mtd1: 00200000 00020000 "fip"
mtd2: 00300000 00020000 "reserved"
mtd3: 00080000 00020000 "bl2"
# cat /proc/partitions
major minor #blocks name
31 0 125440 mtdblock0
31 1 2048 mtdblock1
31 2 3072 mtdblock2
31 3 512 mtdblock3
I build a u-boot.bin from the u-boot taken here.
I used this defconfig : mt7986_spim_nand_rfb_defconfig
For ATF, i used this command :
ARCH=arm64 CROSS_COMPILE=/diagbox_r3/toolchain/gcc-linaro-7.5.0-2019.12-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- make -f Makefile PLAT=mt7986 BOOT_DEVICE=spim-nand DRAM_USE_DDR4=1 BL33=/diagbox_r3/bootloader/u-boot-mtksoc/u-boot.bin all fip
I put bl2 and fip on the sdcard, boot on the sdcard.
i burn ( with command line dd) bl2 in mtdblock3 and fip in mtdblock1. I tried only the fip too.
After i change the switch jumper for nand (1,3,4 high and 2 low)
When i boot on nand, i have an error : system halt
I have tried all week, i donât see my big mistake(s)
Better to use nand or nor?
thank by advance
Please show full output. If no bl2 is shown,check if bl2 is written correctly.
I would say that your mtd partition table is wrong. Afaik on spi-nand bl2 is at offset 0x0. And in my overlay it is too
Hy, Thank you to answer me.
Here the output :
F0: 102B 0000
FA: 1040 0000
FA: 1040 0000 [0200]
F9: 3903 0041
F3: 1001 0000 [0200]
F3: 1001 0000
F6: 102C 0000
F5: 1026 0000
00: 1005 0000
FA: 1040 0000
FA: 1040 0000 [0200]
F9: 3903 0041
F3: 1001 0000 [0200]
F3: 1001 0000
F6: 102C 0000
01: 102A 0001
02: 1005 0000 BP: 2000 00C0 [0001] EC: 0000 0000 [1000] T0: 0000 00BA [010F] System halt!
The mtd partitions is done by the dtbo?
Here the dts i sued to make the dtbo :
I used this command :
dtc -O dtb -o diagbox-nand.dtbo mt7986a-bananapi-bpi-r3-nand.dts
/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
/dts-v1/;
/plugin/;
//dtc -O dtb -o bpi-r3-nand.dtbo mt7986a-bananapi-bpi-r3-nand.dts
/ {
compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
fragment@0 {
target-path = "/soc/spi@1100a000";
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
spi_nand: spi_nand@0 {
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <10000000>;
spi-tx-buswidth = <4>;
spi-rx-buswidth = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bl2";
reg = <0x0 0x80000>;
};
partition@80000 {
label = "reserved";
reg = <0x80000 0x300000>;
};
partition@380000 {
label = "fip";
reg = <0x380000 0x200000>;
};
partition@580000 {
label = "ubi";
reg = <0x580000 0x7a80000>;
};
};
};
};
};
};Dts is right,and imho command too,but it seems not to be used for your partitions as offset does not match
I tried to use nor, same command used for nand with dts nor found in the kernelâs folder. But i dont see thĂ© mtd.
I look on thĂ© main dts and i didânt fond something which can explain the problem of offset.
For nor you have to change switch (for spi chip select).
Maybe mtd is passed via cmdline,or any default mtd config in kernel?
How do you load the dto? Via fit and bootconf?
You can look in linux userspace for full dts
dtc -I fs -O dts /sys/firmware/devicetree/base | less
To verify dto is applied
Ah, have seen mtd command you used above only shows the size,not the offset. So try again with nand dto and look in dmesg for offset.
I also noticed i had to erase the nand first before writing to it,maybe you need it too. I used uboot for flashing nand,but should work in uboot too
Hy
i load the dto via Fit.
Iâll check all cmdline of uboot and try the command dtc tonight.
Here again
the output of the command dtc
/dts-v1/;
/ {
#address-cells = <0x02>;
model = "Bananapi BPI-R3";
#size-cells = <0x02>;
interrupt-parent = <0x01>;
compatible = "bananapi,bpi-r3\0mediatek,mt7986a";
regulator-3p3v {
regulator-max-microvolt = <0x325aa0>;
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <0x325aa0>;
regulator-name = "fixed-3.3V";
compatible = "regulator-fixed";
phandle = <0x10>;
};
oscillator@0 {
clock-output-names = "clkxtal";
#clock-cells = <0x00>;
clock-frequency = <0x2625a00>;
compatible = "fixed-clock";
phandle = <0x18>;
};
sfp1 {
i2c-bus = <0x24>;
los-gpio = <0x06 0x2e 0x00>;
tx-disable-gpio = <0x06 0x14 0x00>;
tx-fault-gpio = <0x06 0x07 0x00>;
compatible = "sff,sfp";
moddef0-gpio = <0x06 0x31 0x01>;
phandle = <0x1c>;
};
memory@40000000 {
device_type = "memory";
reg = <0x00 0x40000000 0x00 0x80000000>;
};
regulator-5v {
regulator-max-microvolt = <0x4c4b40>;
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <0x4c4b40>;
regulator-name = "fixed-5V";
compatible = "regulator-fixed";
phandle = <0x11>;
};
i2c-gpio-1 {
#address-cells = <0x01>;
#size-cells = <0x00>;
compatible = "i2c-gpio";
i2c-gpio,delay-us = <0x02>;
phandle = <0x25>;
scl-gpios = <0x06 0x13 0x06>;
sda-gpios = <0x06 0x12 0x06>;
};
soc {
#address-cells = <0x02>;
#size-cells = <0x02>;
compatible = "simple-bus";
ranges;
syscon@10060000 {
#clock-cells = <0x01>;
compatible = "mediatek,mt7986-sgmiisys_0\0syscon";
reg = <0x00 0x10060000 0x00 0x1000>;
phandle = <0x1a>;
};
infracfg@10001000 {
#clock-cells = <0x01>;
compatible = "mediatek,mt7986-infracfg\0syscon";
reg = <0x00 0x10001000 0x00 0x1000>;
phandle = <0x03>;
};
usb@11200000 {
clock-names = "sys_ck\0xhci_ck\0ref_ck\0mcu_ck\0dma_ck";
reg-names = "mac\0ippc";
vusb33-supply = <0x10>;
interrupts = <0x00 0xad 0x04>;
clocks = <0x03 0x31 0x02 0x3b 0x03 0x32 0x03 0x2f 0x03 0x30>;
vbus-supply = <0x11>;
compatible = "mediatek,mt7986-xhci\0mediatek,mtk-xhci";
status = "okay";
phys = <0x0d 0x03 0x0e 0x04 0x0f 0x03>;
reg = <0x00 0x11200000 0x00 0x2e00 0x00 0x11203e00 0x00 0x100>;
};
spi@1100b000 {
pinctrl-names = "default";
#address-cells = <0x01>;
pinctrl-0 = <0x05>;
clock-names = "parent-clk\0sel-clk\0spi-clk\0hclk";
interrupts = <0x00 0x8d 0x04>;
clocks = <0x02 0x04 0x02 0x1d 0x03 0x24 0x03 0x26>;
#size-cells = <0x00>;
compatible = "mediatek,mt7986-spi-ipm\0mediatek,spi-ipm";
status = "okay";
reg = <0x00 0x1100b000 0x00 0x100>;
cs-gpios = <0x00 0x00>;
};
mmc@11230000 {
pinctrl-names = "default\0state_uhs";
pinctrl-0 = <0x12>;
clock-names = "source\0hclk\0axi_cg\0ahb_cg";
cap-sd-highspeed;
vqmmc-supply = <0x14>;
assigned-clocks = <0x02 0x23 0x02 0x22>;
assigned-clock-parents = <0x07 0x06 0x02 0x12>;
bus-width = <0x04>;
interrupts = <0x00 0x8f 0x04>;
clocks = <0x03 0x28 0x03 0x29 0x03 0x2b 0x03 0x2a>;
vmmc-supply = <0x10>;
compatible = "mediatek,mt7986-mmc";
pinctrl-1 = <0x13>;
status = "okay";
reg = <0x00 0x11230000 0x00 0x1000 0x00 0x11c20000 0x00 0x1000>;
max-frequency = <0x3197500>;
};
serial@11002000 {
clock-names = "baud\0bus";
assigned-clocks = <0x02 0x1e 0x03 0x01>;
assigned-clock-parents = <0x02 0x00 0x02 0x1e>;
interrupts = <0x00 0x7b 0x04>;
clocks = <0x03 0x01 0x03 0x1d>;
compatible = "mediatek,mt7986-uart\0mediatek,mt6577-uart";
status = "okay";
reg = <0x00 0x11002000 0x00 0x400>;
};
apmixedsys@1001e000 {
#clock-cells = <0x01>;
compatible = "mediatek,mt7986-apmixedsys";
reg = <0x00 0x1001e000 0x00 0x1000>;
phandle = <0x07>;
};
t-phy@11e10000 {
#address-cells = <0x02>;
#size-cells = <0x02>;
compatible = "mediatek,mt7986-tphy\0mediatek,generic-tphy-v2";
ranges;
status = "okay";
usb-phy@11e10700 {
clock-names = "ref";
clocks = <0x02 0x35>;
#phy-cells = <0x01>;
reg = <0x00 0x11e10700 0x00 0x900>;
phandle = <0x0e>;
};
usb-phy@11e10000 {
clock-names = "ref\0da_ref";
clocks = <0x02 0x3c 0x02 0x3d>;
#phy-cells = <0x01>;
reg = <0x00 0x11e10000 0x00 0x700>;
phandle = <0x0d>;
};
usb-phy@11e11000 {
clock-names = "ref\0da_ref";
clocks = <0x02 0x3c 0x02 0x3d>;
#phy-cells = <0x01>;
reg = <0x00 0x11e11000 0x00 0x700>;
phandle = <0x0f>;
};
};
trng@1020f000 {
clock-names = "rng";
clocks = <0x03 0x37>;
compatible = "mediatek,mt7986-rng\0mediatek,mt7623-rng";
status = "okay";
reg = <0x00 0x1020f000 0x00 0x100>;
};
t-phy@11c00000 {
#address-cells = <0x02>;
#size-cells = <0x02>;
compatible = "mediatek,mt7986-tphy\0mediatek,generic-tphy-v2";
ranges;
status = "okay";
pcie-phy@11c00000 {
clock-names = "ref";
clocks = <0x18>;
#phy-cells = <0x01>;
reg = <0x00 0x11c00000 0x00 0x20000>;
phandle = <0x15>;
};
};
syscon@10070000 {
#clock-cells = <0x01>;
compatible = "mediatek,mt7986-sgmiisys_1\0syscon";
reg = <0x00 0x10070000 0x00 0x1000>;
phandle = <0x1b>;
};
i2c@11008000 {
clock-div = <0x05>;
pinctrl-names = "default";
#address-cells = <0x01>;
pinctrl-0 = <0x0c>;
clock-names = "main\0dma";
interrupts = <0x00 0x88 0x04>;
#size-cells = <0x00>;
compatible = "mediatek,mt7986-i2c";
status = "okay";
reg = <0x00 0x11008000 0x00 0x90 0x00 0x10217080 0x00 0x80>;
};
watchdog@1001c000 {
#reset-cells = <0x01>;
interrupts = <0x00 0x6e 0x04>;
compatible = "mediatek,mt7986-wdt\0mediatek,mt6589-wdt";
status = "disabled";
reg = <0x00 0x1001c000 0x00 0x1000>;
phandle = <0x1f>;
};
pwm@10048000 {
pinctrl-names = "default";
pinctrl-0 = <0x08 0x09>;
clock-names = "top\0main\0pwm1\0pwm2";
interrupts = <0x00 0x89 0x04>;
#clock-cells = <0x01>;
#pwm-cells = <0x02>;
compatible = "mediatek,mt7986-pwm";
status = "okay";
reg = <0x00 0x10048000 0x00 0x1000>;
};
wifi@18000000 {
pinctrl-names = "default\0dbdc";
mediatek,eeprom-data = <0x86790900 0xc4326 0x60000000 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x1000000 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x800 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x24649090 0x280000 0x5100000 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x21e00 0x21e0002 0x1e00021e 0x22800 0x2280002 0x28000228 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x8080 0x8080fdf7 0x903150d 0x80808080 0x80808080 0x5050d0d 0x1313c6c6 0xc3c3c200 0xc200c2 0x8182 0x8585c2c2 0x82828282 0x858500c2 0xc2000081 0x82858587 0x87c2c200 0x81818285 0x858787c2 0xc2000081 0x82858587 0x87c2c200 0x818285 0x858787c2 0xc2000081 0x82858587 0x87c4c4c2 0xc100c300 0xc3c3c100 0x818383c3 0xc3c3c100 0x81838300 0xc2c2c2c0 0x81828484 0xc3 0xc3c3c100 0x81838386 0x86c3c3c3 0xc1008183 0x838686c2 0xc2c2c081 0x82848486 0x86c3c3c3 0xc1008183 0x838686c3 0xc3c3c100 0x81838386 0x86c3c3c3 0xc1008183 0x83868622 0x28002228 0x222800 0x22280000 0xdddddddd 0xdddddddd 0xddbbbbbb 0xccccccdd 0xdddddddd 0xdddddddd 0xeeeeeecc 0xccccdddd 0xdddddddd 0x4a5662 0x4a 0x56620000 0x4a5662 0x4a 0x56620000 0x88888888 0x33333326 0x26262626 0x26262600 0x33333326 0x26262626 0x26262600 0x33333326 0x26262626 0x26262600 0x33333326 0x26262626 0x26262600 0x00 0xf0f0cc00 0x00 0xaaaa 0xaabbbbbb 0xcccccccc 0xccccbbbb 0xbbbbbbbb 0xbbbbbbaa 0xaaaabbbb 0xbbaaaaaa 0x999999aa 0xaaaabbbb 0xbbcccccc 0x00 0xaaaa 0xaa000000 0xbbbbbbbb 0xbbbbaaaa 0xaa999999 0xaaaaaaaa 0xaaaaaaaa 0xaaaaaaaa 0xaaaaaaaa 0xaaaabbbb 0xbbbbbbbb 0x00 0x00 0x00 0x99999999 0x9999aaaa 0xaaaaaaaa 0x999999aa 0xaaaaaaaa 0xaaaaaaaa 0xaaaaaaaa 0xaaaabbbb 0xbbbbbbbb 0x00 0xeeee 0xeeffffff 0xcccccccc 0xccccdddd 0xddbbbbbb 0xccccccbb 0xbbbbbbbb 0xbbbbbbbb 0xbbbbbbbb 0xbbbbcccc 0xccdddddd 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x88888888 0x88888888 0x88888888 0x88888888 0x88888888 0x88888888 0x88888888 0x88888888 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x6000100 0x1050002 0xff0300 0xf900fe03 0x00 0x00 0x9b 0x6e370000 0x00 0xfc0009 0xa00fe00 0x60700fe 0x70800 0x5000b0a 0x00 0x00 0xe2 0x96460000 0x00 0x400f7 0xf8000300 0xfcfe0003 0xfbfc00 0xee00e3f2 0x00 0x00 0x11 0xbb550000 0x00 0x600f6 0xfc000300 0xfbfe0004 0xfafe00 0xf600ecf2 0x00 0x00 0x1f 0xbf580000 0x00 0x600f5 0xf6000400 0xf8f90004 0xf7f800 0xf700f0f4 0x00 0x00 0x24 0xbe570000 0x00 0x800f8 0xfe000600 0xf8fd0007 0xf9fe00 0xf500f0f4 0x00 0x00 0x2d 0xd6610000 0x00 0x400f7 0xfc000500 0xf7fc0005 0xf7fc00 0xf900f5f8 0x00 0x00 0x26 0xd96e0000 0x00 0x400f7 0xf9000600 0xf5f70005 0xf5f800 0xf900f4f7 0x00 0x00 0x1b 0xce690000 0x00 0x300f8 0xf8000600 0xf6f60004 0xf6f700 0xf900f4f7 0x00 0x00 0x18 0xd8720000 0x00 0x00 0x2404002 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xc1c2c1c2 0x41c341c3 0x3fc13fc1 0x40c13fc2 0x3fc240c1 0x41c040c0 0x3fc23fc2 0x40c13fc2 0x3fc140c0 0x41c040c0 0x3fc33fc3 0x40c23fc2 0x3fc240c1 0x41c040c0 0x3fc23fc2 0x40c23fc2 0x3fc140c1 0x41c040c0 0x00 0x00 0x41c741c7 0xc1c7c1c7 0x00 0x00 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0xa0ce00 0x00 0xb6840000 0x00 0x00 0x00 0x18181818 0x18181818 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x4b5763 0x4b 0x57630000 0x4b5763 0x4b 0x57630000 0x88888888 0x8474759 0x69780849 0x49596d7a 0x849495a 0x6d790848 0x48596c78 0x8484858 0x6a780848 0x48586a78 0x8484858 0x6c78084a 0x4a5b6d79 0x8474759 0x697a0848 0x48596b79 0x8484859 0x6c7a0848 0x48586c79 0x8484857 0x68770848 0x48576877 0x8484857 0x6a77084a 0x4a5a6a77 0x8464659 0x69790848 0x48586b79 0x8484858 0x6c7a0848 0x48596c79 0x8484857 0x68770848 0x48576877 0x8494958 0x6d7a084b 0x4b5c6c77 0x847475a 0x6a7b0849 0x495a6e7c 0x849495a 0x6e7c0849 0x495b6e7c 0x8494959 0x6a7a0849 0x49596a7a 0x84a4a5a 0x6f7d084b 0x4b5c6e7b 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x85848484 0xc3c4c4c5 0xc4c3c33f 0xc3c3c2c2 0xc2c2c03f 0xc3c3c3c4 0xc4c4c33f 0xc2c2c2c2 0xc1c3c1c1 0xc0c08282 0x83848686 0x88880000 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x1111 0x00 0x8080f703 0x10808080 0x80050d13 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xa4 0xce000000 0xb684 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
pinctrl-0 = <0x21 0x22>;
clock-names = "mcu\0ap2conn";
resets = <0x1f 0x17>;
memory-region = <0x20>;
interrupts = <0x00 0xd5 0x04 0x00 0xd6 0x04 0x00 0xd7 0x04 0x00 0xd8 0x04>;
clocks = <0x02 0x32 0x02 0x3e>;
compatible = "mediatek,mt7986-wmac";
pinctrl-1 = <0x23 0x22>;
status = "okay";
reg = <0x00 0x18000000 0x00 0x1000000 0x00 0x10003000 0x00 0x1000 0x00 0x11d10000 0x00 0x1000>;
reset-names = "consys";
};
pinctrl@1001f000 {
reg-names = "gpio\0iocfg_rt\0iocfg_rb\0iocfg_lt\0iocfg_lb\0iocfg_tr\0iocfg_tl\0eint";
gpio-controller;
interrupts = <0x00 0xe1 0x04>;
interrupt-parent = <0x01>;
compatible = "mediatek,mt7986a-pinctrl";
#interrupt-cells = <0x02>;
reg = <0x00 0x1001f000 0x00 0x1000 0x00 0x11c30000 0x00 0x1000 0x00 0x11c40000 0x00 0x1000 0x00 0x11e20000 0x00 0x1000 0x00 0x11e30000 0x00 0x1000 0x00 0x11f00000 0x00 0x1000 0x00 0x11f10000 0x00 0x1000 0x00 0x1000b000 0x00 0x1000>;
phandle = <0x06>;
#gpio-cells = <0x02>;
gpio-ranges = <0x06 0x00 0x00 0x64>;
interrupt-controller;
wf-2g-5g-pins {
phandle = <0x21>;
mux {
function = "wifi";
groups = "wf_2g\0wf_5g";
};
conf {
pins = "WF0_HB1\0WF0_HB2\0WF0_HB3\0WF0_HB4\0WF0_HB0\0WF0_HB0_B\0WF0_HB5\0WF0_HB6\0WF0_HB7\0WF0_HB8\0WF0_HB9\0WF0_HB10\0WF0_TOP_CLK\0WF0_TOP_DATA\0WF1_HB1\0WF1_HB2\0WF1_HB3\0WF1_HB4\0WF1_HB0\0WF1_HB5\0WF1_HB6\0WF1_HB7\0WF1_HB8\0WF1_TOP_CLK\0WF1_TOP_DATA";
drive-strength = <0x04>;
};
};
wf-dbdc-pins {
phandle = <0x23>;
mux {
function = "wifi";
groups = "wf_dbdc";
};
conf {
pins = "WF0_HB1\0WF0_HB2\0WF0_HB3\0WF0_HB4\0WF0_HB0\0WF0_HB0_B\0WF0_HB5\0WF0_HB6\0WF0_HB7\0WF0_HB8\0WF0_HB9\0WF0_HB10\0WF0_TOP_CLK\0WF0_TOP_DATA\0WF1_HB1\0WF1_HB2\0WF1_HB3\0WF1_HB4\0WF1_HB0\0WF1_HB5\0WF1_HB6\0WF1_HB7\0WF1_HB8\0WF1_TOP_CLK\0WF1_TOP_DATA";
drive-strength = <0x04>;
};
};
mmc0-uhs-pins {
phandle = <0x13>;
conf-cmd-dat {
pins = "EMMC_DATA_0\0EMMC_DATA_1\0EMMC_DATA_2\0EMMC_DATA_3\0EMMC_DATA_4\0EMMC_DATA_5\0EMMC_DATA_6\0EMMC_DATA_7\0EMMC_CMD";
drive-strength = <0x04>;
input-enable;
mediatek,pull-up-adv = <0x01>;
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <0x04>;
mediatek,pull-up-adv = <0x01>;
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <0x06>;
mediatek,pull-down-adv = <0x02>;
};
mux {
function = "emmc";
groups = "emmc_51";
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <0x02>;
};
};
pcie-pins {
phandle = <0x17>;
mux {
function = "pcie";
groups = "pcie_clk\0pcie_pereset";
};
};
spi-flash-pins {
phandle = <0x04>;
mux {
function = "spi";
groups = "spi0\0spi0_wp_hold";
};
};
pwm1-pin-22 {
phandle = <0x09>;
mux {
function = "pwm";
groups = "pwm1_0";
};
};
spic-pins {
phandle = <0x05>;
mux {
function = "spi";
groups = "spi1_0";
};
};
mmc0-pins {
phandle = <0x12>;
conf-cmd-dat {
pins = "EMMC_DATA_0\0EMMC_DATA_1\0EMMC_DATA_2\0EMMC_DATA_3\0EMMC_DATA_4\0EMMC_DATA_5\0EMMC_DATA_6\0EMMC_DATA_7\0EMMC_CMD";
drive-strength = <0x04>;
input-enable;
mediatek,pull-up-adv = <0x01>;
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <0x04>;
mediatek,pull-up-adv = <0x01>;
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <0x06>;
mediatek,pull-down-adv = <0x02>;
};
mux {
function = "emmc";
groups = "emmc_51";
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <0x02>;
};
};
uart2-pins {
phandle = <0x0b>;
mux {
function = "uart";
groups = "uart2_0_rx_tx";
};
};
pwm0-pin-21 {
phandle = <0x08>;
mux {
function = "pwm";
groups = "pwm0";
};
};
uart1-pins {
phandle = <0x0a>;
mux {
function = "uart";
groups = "uart1_rx_tx";
};
};
wf-led-pins {
phandle = <0x22>;
mux {
function = "led";
groups = "wifi_led";
};
};
i2c-pins-3-4 {
phandle = <0x0c>;
mux {
function = "i2c";
groups = "i2c";
};
};
};
ethernet@15100000 {
#reset-cells = <0x01>;
#address-cells = <0x01>;
clock-names = "fe\0gp2\0gp1\0wocpu1\0wocpu0\0sgmii_tx250m\0sgmii_rx250m\0sgmii_cdr_ref\0sgmii_cdr_fb\0sgmii2_tx250m\0sgmii2_rx250m\0sgmii2_cdr_ref\0sgmii2_cdr_fb\0netsys0\0netsys1";
assigned-clocks = <0x02 0x2e 0x02 0x2f>;
assigned-clock-parents = <0x07 0x01 0x07 0x03>;
interrupts = <0x00 0xc4 0x04 0x00 0xc5 0x04 0x00 0xc6 0x04 0x00 0xc7 0x04>;
clocks = <0x19 0x00 0x19 0x01 0x19 0x02 0x19 0x03 0x19 0x04 0x1a 0x00 0x1a 0x01 0x1a 0x02 0x1a 0x03 0x1b 0x00 0x1b 0x01 0x1b 0x02 0x1b 0x03 0x02 0x2b 0x02 0x2c>;
mediatek,sgmiisys = <0x1a 0x1b>;
#size-cells = <0x00>;
mediatek,ethsys = <0x19>;
compatible = "mediatek,mt7986-eth";
status = "okay";
reg = <0x00 0x15100000 0x00 0x80000>;
mac@0 {
phy-mode = "2500base-x";
compatible = "mediatek,eth-mac";
reg = <0x00>;
phandle = <0x1e>;
fixed-link {
full-duplex;
speed = <0x9c4>;
pause;
};
};
mdio-bus {
#address-cells = <0x01>;
#size-cells = <0x00>;
switch@0 {
reset-gpios = <0x06 0x20 0x00>;
compatible = "mediatek,mt7531";
reg = <0x1f>;
ports {
#address-cells = <0x01>;
#size-cells = <0x00>;
port@0 {
label = "wan";
reg = <0x00>;
};
port@5 {
phy-mode = "2500base-x";
label = "lan4";
managed = "in-band-status";
reg = <0x05>;
sfp = <0x1d>;
};
port@3 {
label = "lan2";
reg = <0x03>;
};
port@1 {
label = "lan0";
reg = <0x01>;
};
port@6 {
phy-mode = "2500base-x";
label = "cpu";
reg = <0x06>;
ethernet = <0x1e>;
fixed-link {
full-duplex;
speed = <0x9c4>;
pause;
};
};
port@4 {
label = "lan3";
reg = <0x04>;
};
port@2 {
label = "lan1";
reg = <0x02>;
};
};
};
};
mac@1 {
phy-mode = "2500base-x";
compatible = "mediatek,eth-mac";
reg = <0x01>;
sfp = <0x1c>;
fixed-link {
full-duplex;
speed = <0x3e8>;
pause;
};
};
};
spi@1100a000 {
pinctrl-names = "default";
#address-cells = <0x01>;
pinctrl-0 = <0x04>;
clock-names = "parent-clk\0sel-clk\0spi-clk\0hclk";
interrupts = <0x00 0x8c 0x04>;
clocks = <0x02 0x04 0x02 0x1c 0x03 0x23 0x03 0x25>;
#size-cells = <0x00>;
compatible = "mediatek,mt7986-spi-ipm\0mediatek,spi-ipm";
status = "okay";
reg = <0x00 0x1100a000 0x00 0x100>;
cs-gpios = <0x00 0x00>;
spi_nand@0 {
spi-tx-buswidth = <0x04>;
spi-max-frequency = <0x989680>;
spi-rx-buswidth = <0x04>;
compatible = "spi-nand";
reg = <0x00>;
partitions {
#address-cells = <0x01>;
#size-cells = <0x01>;
compatible = "fixed-partitions";
partition@380000 {
read-only;
label = "fip";
reg = <0x380000 0x200000>;
};
partition@0 {
read-only;
label = "bl2";
reg = <0x00 0x80000>;
};
partition@80000 {
label = "reserved";
reg = <0x80000 0x300000>;
};
partition@580000 {
label = "ubi";
reg = <0x580000 0x7a80000>;
};
};
};
};
serial@11004000 {
pinctrl-names = "default";
pinctrl-0 = <0x0b>;
clock-names = "baud\0bus";
assigned-clocks = <0x03 0x03>;
assigned-clock-parents = <0x02 0x36>;
interrupts = <0x00 0x7d 0x04>;
clocks = <0x03 0x03 0x03 0x1f>;
compatible = "mediatek,mt7986-uart\0mediatek,mt6577-uart";
status = "okay";
reg = <0x00 0x11004000 0x00 0x400>;
};
interrupt-controller@c000000 {
interrupts = <0x01 0x09 0x04>;
interrupt-parent = <0x01>;
compatible = "arm,gic-v3";
#interrupt-cells = <0x03>;
reg = <0x00 0xc000000 0x00 0x10000 0x00 0xc080000 0x00 0x80000 0x00 0xc400000 0x00 0x2000 0x00 0xc410000 0x00 0x1000 0x00 0xc420000 0x00 0x2000>;
phandle = <0x01>;
interrupt-controller;
};
crypto@10320000 {
clock-names = "infra_eip97_ck";
assigned-clocks = <0x02 0x33>;
assigned-clock-parents = <0x07 0x01>;
interrupts = <0x00 0x74 0x04 0x00 0x75 0x04 0x00 0x76 0x04 0x00 0x77 0x04>;
clocks = <0x03 0x10>;
compatible = "inside-secure,safexcel-eip97";
status = "okay";
interrupt-names = "ring0\0ring1\0ring2\0ring3";
reg = <0x00 0x10320000 0x00 0x40000>;
};
pcie@11280000 {
pinctrl-names = "default";
#address-cells = <0x03>;
phy-names = "pcie-phy";
bus-range = <0x00 0xff>;
pinctrl-0 = <0x17>;
reg-names = "pcie-mac";
interrupts = <0x00 0xa8 0x04>;
clocks = <0x03 0x09 0x03 0x33 0x03 0x34 0x03 0x35 0x03 0x36>;
interrupt-map = <0x00 0x00 0x00 0x01 0x16 0x00 0x00 0x00 0x00 0x02 0x16 0x01 0x00 0x00 0x00 0x03 0x16 0x02 0x00 0x00 0x00 0x04 0x16 0x03>;
#size-cells = <0x02>;
device_type = "pci";
interrupt-map-mask = <0x00 0x00 0x00 0x07>;
compatible = "mediatek,mt7986-pcie\0mediatek,mt8192-pcie";
ranges = <0x82000000 0x00 0x20000000 0x00 0x20000000 0x00 0x10000000>;
#interrupt-cells = <0x01>;
status = "okay";
phys = <0x15 0x02>;
reg = <0x00 0x11280000 0x00 0x4000>;
interrupt-controller {
#address-cells = <0x00>;
#interrupt-cells = <0x01>;
phandle = <0x16>;
interrupt-controller;
};
};
serial@11003000 {
pinctrl-names = "default";
pinctrl-0 = <0x0a>;
clock-names = "baud\0bus";
assigned-clocks = <0x03 0x02>;
assigned-clock-parents = <0x02 0x36>;
interrupts = <0x00 0x7c 0x04>;
clocks = <0x03 0x02 0x03 0x1e>;
compatible = "mediatek,mt7986-uart\0mediatek,mt6577-uart";
status = "okay";
reg = <0x00 0x11003000 0x00 0x400>;
};
syscon@15000000 {
#reset-cells = <0x01>;
#address-cells = <0x01>;
#size-cells = <0x01>;
#clock-cells = <0x01>;
compatible = "mediatek,mt7986-ethsys\0syscon";
reg = <0x00 0x15000000 0x00 0x1000>;
phandle = <0x19>;
};
topckgen@1001b000 {
#clock-cells = <0x01>;
compatible = "mediatek,mt7986-topckgen\0syscon";
reg = <0x00 0x1001b000 0x00 0x1000>;
phandle = <0x02>;
};
};
leds {
compatible = "gpio-leds";
led-1 {
function = "status";
color = <0x03>;
default-state = "off";
gpios = <0x06 0x56 0x00>;
};
led-0 {
function = "power";
color = <0x02>;
default-state = "on";
gpios = <0x06 0x45 0x00>;
};
};
psci {
method = "smc";
compatible = "arm,psci-0.2";
};
gpio-keys {
compatible = "gpio-keys";
wps {
label = "wps";
linux,code = <0x211>;
gpios = <0x06 0x0a 0x01>;
};
factory {
label = "reset";
linux,code = <0x198>;
gpios = <0x06 0x09 0x01>;
};
};
sfp2 {
tx-disable-gpios = <0x06 0x0f 0x00>;
i2c-bus = <0x25>;
mod-def0-gpios = <0x06 0x2f 0x01>;
compatible = "sff,sfp";
tx-fault-gpios = <0x06 0x30 0x00>;
phandle = <0x1d>;
los-gpios = <0x06 0x1f 0x00>;
};
regulator-1p8v {
regulator-max-microvolt = <0x1b7740>;
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <0x1b7740>;
regulator-name = "fixed-1.8V";
compatible = "regulator-fixed";
phandle = <0x14>;
};
timer {
interrupts = <0x01 0x0d 0x08 0x01 0x0e 0x08 0x01 0x0b 0x08 0x01 0x0a 0x08>;
interrupt-parent = <0x01>;
compatible = "arm,armv8-timer";
};
aliases {
serial0 = "/soc/serial@11002000";
};
chosen {
u-boot,version = "2022.07";
bootargs = "board=DiagBox earlycon=uart8250,mmio32,0x11002000 debug=7 root=/dev/mmcblk0p6";
u-boot,bootconf = "conf-1";
stdout-path = "serial0:115200n8";
};
i2c-gpio-0 {
#address-cells = <0x01>;
#size-cells = <0x00>;
compatible = "i2c-gpio";
i2c-gpio,delay-us = <0x02>;
phandle = <0x24>;
scl-gpios = <0x06 0x11 0x06>;
sda-gpios = <0x06 0x10 0x06>;
};
cpus {
#address-cells = <0x01>;
#size-cells = <0x00>;
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x01>;
enable-method = "psci";
#cooling-cells = <0x02>;
};
cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x02>;
enable-method = "psci";
#cooling-cells = <0x02>;
};
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x00>;
enable-method = "psci";
#cooling-cells = <0x02>;
};
cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x03>;
enable-method = "psci";
#cooling-cells = <0x02>;
};
};
reserved-memory {
#address-cells = <0x02>;
#size-cells = <0x02>;
ranges;
secmon@43000000 {
reg = <0x00 0x43000000 0x00 0x30000>;
no-map;
};
wmcpu-reserved@4fc00000 {
reg = <0x00 0x4fc00000 0x00 0x100000>;
phandle = <0x20>;
no-map;
};
};
};
And here the output of dmesg | grep nand and mtd
# dmesg | grep 'nand'
[ 1.064452] spi-nand spi0.0: Winbond SPI NAND was found.
[ 1.069776] spi-nand spi0.0: 128 MiB, block size: 128 KiB, page size: 2048, OOB size: 64
# dmesg | grep 'nmtd'
# dmesg | grep 'mtd'
[ 2.845252] mtdblock: MTD device 'fip' is NAND, please consider using UBI block devices instead.
[ 2.846263] mtdblock: MTD device 'bl2' is NAND, please consider using UBI block devices instead.
[ 2.854526] mtdblock: MTD device 'reserved' is NAND, please consider using UBI block devices instead.
[ 2.854537] mtdblock: MTD device 'ubi' is NAND, please consider using UBI block devices instead.Dts looks good, so just erase bl2 and fip partition,write the right binaries (bl2.img,fip.bin),maybe verify it via hexdump,change bootswitches (sw1/sw2) and try booting
Hy
The output of hexdump of bl2 bl2 The output of hexdump of fip fip
For the boo switches itâs :
A-high
B-low
C and D-high
isnât it?
I flashed the nand like this :
# cat /proc/mtd
dev: size erasesize name
mtd0: 07a80000 00020000 "ubi"
mtd1: 00200000 00020000 "fip"
mtd2: 00300000 00020000 "reserved"
mtd3: 00080000 00020000 "bl2"
#
#
#
# dd if=bl2.img of=/dev/mtd3
401+1 records in
401+1 records out
# dd if=fip.bin of=/dev/mtd1
1403+1 records in
1403+1 records out
#
But same error when i tried to boot with nand :
F0: 102B 0000
FA: 1040 0000
FA: 1040 0000 [0200]
F9: 0000 0000
L0: 3901 0031 [0001]
00: 1012 0000
F9: 0000 0000
L0: 3901 0031 [0001]
01: 102A 0001
02: 1012 0000
BP: 2000 00C0 [0001]
EC: 0000 0000 [1000]
T0: 0000 00B8 [010F]
System halt!
For the u-boot, i used this one here. And the defconfig : mt7986_spim_nand_rfb_defconfig, found here
could you redo the hexdump with â-Câ switch?
hexdump -C /dev/mtdblock3
just want to see the first bytes (header)âŠonly bl2 is interesting at this moment as this is the one picked up by bootrom
i have an v1.0 where the switches are named differentlyâŠbut C+D should be sw5+6 (SD/emmc and NAND/NOR) on my board.
nand bl2 needs NAND-bootheaderâŠhave you changed ATF-device to nand too?
you could try my binaries too: https://drive.google.com/drive/folders/1fxDR-uL3DIO-8ebgqOJd5MoWORQTTm7Z
Hy
Sorry, the output of the hexdump i posted,is about the bl2.img and fit.bin, not the nand, i interpreted badly.
For the atf command, i have introduce the nand like this :
ARCH=arm64 CROSS_COMPILE=/diagbox_r3/toolchain/gcc-linaro-7.5.0-2019.12-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- make -f Makefile PLAT=mt7986 BOOT_DEVICE=spim-nand DRAM_USE_DDR4=1 BL33=/diagbox_r3/bootloader/u-boot-mtksoc/u-boot.bin all fip
Here hexdump :
hexdump -c /dev/mtd3
0000000 S P I N A N D ! 001 \0 \0 \0 020 \0 \0 \0
0000010 \0 \b \0 \0 @ \0 \0 \0 @ \0 \f \0 \0 \0 0
0000020 001 \0 \0 \0 377 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0
0000030 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0
0000040 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 232 ^
0000050 377 377 377 377 377 377 377 377 377 377 377 377 377 377 377 377
0000060 377 377 377 377 377 377 377 377 377 377 373 377 377 377 377 377
0000070 377 377 377 377 377 377 377 377 377 377 377 377 377 377 377 377
*
0000800 M M M 001 8 \0 \0 \0 F I L E _ I N F
0000810 O \0 \0 \0 001 \0 \0 \0 001 \0 002 001 \0 \r \0
0000820 p \n 003 \0 p 002 003 \0 \0 003 \0 \0 \0 \0 \0
0000830 \0 003 \0 \0 001 \0 \0 \0 M M M 001 \f \0 001 \0
0000840 001 \0 \0 \0 M M M 001 024 \0 002 \0 \0 \0 \0 \0
0000850 020 \0 \0 \0 200 \0 \0 \0 M M M 001 024 002 003 \0
0000860 \0 \0 \0 \0 \0 \0 \0 \0 \b \0 \0 \0 \0 \0 \0 \0
0000870 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0
*
0000a60 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 M M M 003
0000a70 d \0 \a \0 220 021 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0
0000a80 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0
*
0000ac0 \0 d \0 \0 210 023 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0
0000ad0 M M M 001 0 \0 \b \0 003 \0 \0 \0 \0 \0 \0 \0
0000ae0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0 \0
*
0000b00 364 003 \0 252 365 003 001 252 366 003 002 252 367 003 003 252
0000b10 \0 006 201 322 240 030 246 362 \0 020 036 325 337 ? 003 325
0000b20 \0 377 027 020 \0 300 036 325 337 ? 003 325 q \0 \0 224
0000b30 A 001 202 322 \0 020 > 325 \0 \0 001 252 \0 020 036 325
0000b40 337 ? 003 325 \0 G 200 322 \0 021 036 325 \0 \0 220 322
0000b50 020 240 362 200 \0 300 362 001 005 8 325 ! 254 h 323
0000b60 A \0 \0 264 \0 \0 m 262 023 036 325 \0 034 200 322
0000b70 \0 234 033 325 377 D 003 325 \0 \0 250 322 001 005 8 325
0000b80 ! 034 D 323 A \0 \0 264 \0 \0 l 262 @ 021 036 325
0000b90 . 024 \0 224 ` \0 \0 5 344 \0 \0 224 006 001 \0 224
0000ba0 , 024 \0 224 200 001 \0 260 \0 \0 \0 221 241 001 \0 260
0000bb0 ! \0 \0 221 ! \0 \0 313 031 001 \0 224 200 001 \0 320
0000bc0 \0 \0 036 221 241 001 \0 220 ! \0 033 221 ! \0 \0 313
0000bd0 ! 001 \0 224 240 001 \0 260 \0 \0 \0 221 241 001 \0 260
0000be0 ! \0 \0 221 ! \0 \0 313 033 001 \0 224 277 @ \0 325
0000bf0 f \0 \0 224 340 003 024 252 341 003 025 252 342 003 026 252
0000c00 343 003 027 252 246 001 \0 224 252 001 \0 224 Y 001 \0 224
0000c10 364 003 \0 252 S \0 \0 224 037 207 016 325 223 \0 \0 224
0000c20 200 206 @ 251 @ 036 325 001 @ 036 325 206 236 D 251
0000c30 204 226 C 251 202 216 B 251 200 206 A 251 340 003 237 326
0000c40 237 7 003 325 337 ? 003 325 361 003 036 252 \a \0 \0 224
0000c50 240 \0 \0 264 001 360 9 325 ! 370 q 222 ! \0 } 262
0000c60 001 360 031 325 002 _ 326 A \0 200 322 = \0 \0 024
0000c70 361 003 036 252 006 \0 \0 224 200 \0 \0 264 001 362 9 325
0000c80 ! \0 h 262 001 362 031 325 002 _ 326 a \0 200 322
0000c90 4 \0 \0 024 361 003 036 252 006 \0 \0 224 200 \0 \0 264
0000ca0 001 362 9 325 ! \0 T 262 001 362 031 325 002 _ 326
0000cb0 a \0 200 322 0 \0 \0 024 363 003 036 252 % \0 \0 224
0000cc0 362 003 \0 252 340 003 022 252 340 377 377 227 340 003 022 252
0000cd0 350 377 377 227 340 003 022 252 357 377 377 227 362 9 325
0000ce0 \0 \0 z 262 362 031 325 337 ? 003 325 ` 002 _ 326
0000cf0 363 003 036 252 036 001 \0 224 006 \0 \0 224 002 004 @ 371
0000d00 376 003 023 252 B \0 \0 264 @ \0 037 326 300 003 _ 326
0000d10 002 \0 8 325 003 376 237 322 003 340 277 362 B \0 003 \n
0000d20 305 ` 021 020 \0 \0 200 322 004 B 021 020 237 \0 005 353
0000d30 340 \0 \0 T 201 004 C 370 ! \0 003 \n ? \0 002 i
0000d40 a 377 377 T 200 300 \0 321 300 003 _ 326 300 003 _ 326
0000d50 001 \0 8 325 \ P 323 \f @ 263 300 003 _ 326
0000d60 " \0 200 322 003 \0 200 322 037 \0 001 353 @ 220 203 232
0000d70 300 003 _ 326 " \0 200 322 003 \0 200 322 037 \0 001 353
0000d80 @ 203 232 300 003 _ 326 200 001 \0 220 \0 \0 036 221
0000d90 037 \0 \0 221 300 003 _ 326 200 005 \0 264 a 005 \0 4
0000da0 B 005 \0 4 037 004 \0 271 d \0 200 R 004 020 \0 271
0000db0 344 \0 200 R 004 \b \0 271 177 \0 037 k 241 \0 \0 T
0000dc0 003 @ 230 R # \0 240 r _ \0 003 k m 001 \0 T
0000dd0 c \0 200 R 003 $ \0 271 # 004 \0 Q D \ 030 S
0000de0 c \0 004 \v c \b 304 032 b | 002 033 ! 004 B \v
0000df0 ! \b 302 032 006 \0 \0 024 037 $ \0 271 ! \f 002 \v
0000e00 B l 034 S # \b 302 032 ! \0 200 R b 020 200 R
0000e10 002 \f \0 271 b 034 \0 022 002 \0 \0 271 c < \b S
0000e20 003 004 \0 271 b \0 200 R 002 \f \0 271 # 004 \0 Q
0000e30 003 ( \0 271 ! \b \0 Q ! | 001 023 001 , \0 271
0000e40 \0 200 R 300 003 _ 326 340 003 037 * 300 003 _ 326
0000e50 001 024 @ 271 a \0 \0 6 \0 \0 @ 271 300 003 _ 326
0000e60 \0 \0 200 022 300 003 _ 326 037 h \0 q 341 \0 \0 T
0000e70 " 024 @ 271 B 004 033 022 _ 200 001 q 241 377 377 T
0000e80 242 001 200 R " \0 \0 271 " 024 @ 271 B 004 033 022
0000e90 _ 200 001 q 241 377 377 T \0 \0 271 300 003 _ 326
0000ea0 001 024 @ 271 ! 004 033 022 ? 200 001 q 241 377 377 T
0000eb0 340 003 037 * 300 003 _ 326 \0 024 @ 371 345 377 377 027
0000ec0 ! 024 @ 371 351 377 377 027 \0 024 @ 371 365 377 377 027
0000ed0 347 003 036 252 346 003 004 252 f 002 \0 264 300 024 \0 371
0000ee0 a \0 \0 4 255 377 377 227 340 001 \0 264 340 003 006 252
0000ef0 376 003 \a 252 001 \0 \0 220 ! \0 017 221 001 \b \0 371
0000f00 001 \0 \0 220 ! 340 016 221 001 \f \0 371 001 \0 \0 220
0000f10 ! 017 221 001 020 \0 371 241 \0 200 322 001 004 \0 371
0000f20 265 026 \0 024 340 \0 _ 326 \0 \0 \0 024 \0 \0 204 322
0000f30 \0 242 362 001 @ 213 322 A L 240 362 002 @ 230 322
0000f40 " \0 240 362 # \0 200 322 224 377 377 027 001 \0 204 322
0000f50 001 242 366 305 377 377 027 \0 \0 204 322 \0 242 362
0000f60 320 377 377 027 343 003 036 252 200 024 @ 8 ` \0 \0 264
0000f70 367 377 377 227 375 377 377 027 ` \0 _ 326 005 \b 200 322
0000f80 343 003 036 252 245 020 \0 321 200 $ 305 232 \0 \f @ 222
0000f90 037 ( \0 361 C \0 \0 T \0 234 \0 221 \0 300 \0 221
0000fa0 353 377 377 227 005 377 377 265 ` \0 _ 326 @ 001 200 322
0000fb0 347 377 377 027 346 003 036 252 335 377 377 227 \0 001 \0 264
0000fc0 $ 030 024 020 350 377 377 227 344 003 006 252 204 020 \0 321
0000fd0 353 377 377 227 366 377 377 227 340 377 377 227 376 003 006 252
0000fe0 d \0 \0 024 241 001 \0 264 # \0 ; 325 c L P 323
0000ff0 202 \0 200 322 B 303 232 001 \0 001 213 C 004 \0 321
0001000 \0 \0 # 212 ~ \v 325 \0 \0 002 213 037 \0 001 353
0001010 243 377 377 T 237 ? 003 325 300 003 _ 326 241 001 \0 264
0001020 # \0 ; 325 c L P 323 202 \0 200 322 B 303 232
0001030 001 \0 001 213 C 004 \0 321 \0 \0 # 212 v \b 325
0001040 \0 \0 002 213 037 \0 001 353 243 377 377 T 237 ? 003 325
0001050 300 003 _ 326 002 \0 001 213 0 \0 \0 024 002 \0 001 213
0001060 343 \0 ; 325 c \f @ 323 205 \0 200 322 243 303 232
0001070 ? \0 003 353 # 005 \0 T a 004 \0 321 037 \0 001 352
0001080 ` 002 \0 T 004 \0 001 252 204 004 \0 221 d 004 \0 264
0001090 237 \0 002 353 ( 004 \0 T 037 \f @ 362 340 \0 \0 T
00010a0 005 \f @ 262 245 004 \0 221 205 003 \0 264 037 024 \0 8
00010b0 037 \0 005 353 301 377 377 T 037 \0 004 353 202 \0 \0 T
00010c0 037 | 201 250 037 \0 004 353 303 377 377 T D \0 ! 212
00010d0 037 \0 004 353 242 \0 \0 T t \v 325 \0 \0 003 213
00010e0 037 \0 004 353 243 377 377 T D 354 | 222 037 \0 004 353
00010f0 202 \0 \0 T 037 | 201 250 037 \0 004 353 303 377 377 T
0001100 037 \0 002 353 200 \0 \0 T 037 024 \0 8 037 \0 002 353
0001110 301 377 377 T 300 003 _ 326 037 \f @ 362 ` 376 377 T
0001120 004 \f @ 262 204 004 \0 221 304 376 377 264 237 \0 002 353
0001130 202 376 377 T 037 024 \0 8 037 \0 004 353 301 377 377 T
0001140 352 377 377 027 241 \0 200 322 \0 020 > 325 \0 \0 ! 212
0001150 \0 020 036 325 337 ? 003 325 237 ? 003 325 300 003 _ 326
0001160 241 \0 202 322 371 377 377 027 300 003 _ 326 300 003 _ 326
0001170 177 003 325 377 377 377 027 \0 006 240 322 @ 020 030 325
0001180 300 003 _ 326 \0 \0 200 R 300 003 _ 326 375 { 275 251
0001190 375 003 \0 221 363 S 001 251 365 023 \0 371 002 022 \0 224
00011a0 023 004 @ 371 025 \0 200 R 023 002 \0 265 \0 022 \0 224
00011b0 363 003 \0 252 \0 004 @ 371 \0 \b @ 371 001 \f @ 371
00011c0 A \0 \0 265 023 \f \0 371 X 022 \0 224 356 377 377 227
00011d0 364 003 \0 * 200 005 \0 4 341 003 \0 * @ 001 \0 220
00011e0 \0 004 \0 221 016 \0 \0 024 ` 006 @ 371 \0 004 @ 271
00011f0 200 \0 020 6 u \0 \0 5 5 \0 200 R 020 022 \0 224
0001200 ` 002 @ 271 P 022 \0 224 364 003 \0 * 300 \0 \0 4
0001210 341 003 \0 * @ 001 \0 220 \0 364 004 221 305 025 \0 224
0001220 \r \0 \0 024 a 006 @ 371 004 @ 273 200 001 \b 7
0001230 ` 002 @ 271 211 025 \0 224 364 003 \0 * \0 001 \0 4
0001240 a 002 @ 271 342 003 \0 * @ 001 \0 220 \0 260 005 221
0001250 270 025 \0 224 340 003 024 * 1 026 \0 224 ` 002 @ 271
0001260 D 022 \0 224 364 003 \0 * 240 \0 \0 4 341 003 \0 *
0001270 @ 001 \0 220 \0 L 006 221 351 377 377 027 s \n @ 371
0001280 312 377 377 027 ` 006 @ 371 363 S A 251 \0 \b @ 371
0001290 365 023 @ 371 375 { 303 250 300 003 _ 326 375 { 277 251
00012a0 375 003 \0 221 ^ 022 \0 224 375 { 301 250 f 022 \0 024
00012b0 375 { 276 251 A 001 \0 220 ! 220 004 221 375 003 \0 221
00012c0 363 \v \0 371 S 001 \0 220 s 346 \a 221 340 003 023 252
00012d0 230 025 \0 224 340 003 023 252 A 001 \0 220 ! 030 004 221
00012e0 224 025 \0 224 245 377 377 227 022 022 \0 224 250 377 ^C
Just tired with your binaries : mtdblk3 for bl2 and mtdblk1 for fip :
same error system halt
Thank you a lot for all your help.
Have you done erase the nand before flashing?
I meant hexdump -C (big letter C) because of showing ascii-chars on right side.
Hy
The output of hexdump -C /dev/mtdblk3 here
I erase with this command :
# dd if=/dev/zero of=/dev/mtdblk0 bs=512 count=1
1+0 records in
1+0 records out
# dd if=/dev/zero of=/dev/mtdblk1 bs=512 count=1
1+0 records in
1+0 records out
# dd if=/dev/zero of=/dev/mtdblk2 bs=512 count=1
1+0 records in
1+0 records out
# dd if=/dev/zero of=/dev/mtdblk3 bs=512 count=1
1+0 records in
1+0 records out
# dd if=bl2_nand.img of=/dev/mtdblk3
425+1 records in
425+1 records out
# dd if=fip_nand.bin of=/dev/mtdblk1
1131+1 records in
1131+1 records outYou erase only 1 block Ă 512 byte on each partition. Iâm not sure erase can be done via dd. I had done it in uboot with this special command:
mtd erase spi-nand0
Hexdump looks right. Have you verified switch position of sw2/B (low)? This should snap in and choose between mmc and spi,all other switches should stay same after booting from sdcard