Kernel audio module

Hello,

Which audio module should be include to build the kernel? Mediatek MT8173 chip?

see last patches here https://github.com/BPI-SINOVOIP/BPI-R2-bsp/commits/project_test

I test the project_test branch but it doesn’t compile.

  DTC     arch/arm/boot/dts/mt7623n-bpi-r2.dtb
arch/arm/boot/dts/mt7623n-bpi-r2.dts:265:1: error: unterminated comment
 /*
 ^
scripts/Makefile.lib:293: recipe for target 'arch/arm/boot/dts/mt7623n-bpi-r2.dtb' failed
make[2]: *** [arch/arm/boot/dts/mt7623n-bpi-r2.dtb] Error 1
arch/arm/Makefile:340: recipe for target 'dtbs' failed
make[1]: *** [dtbs] Error 2
make[1]: *** Waiting for unfinished jobs....

https://github.com/BPI-SINOVOIP/BPI-R2-bsp/blob/1277662570697fd0038ef5c58e5782c0e3f7e965/linux-mt/arch/arm/boot/dts/mt7623n-bpi-r2.dts line 275 is a block-comment sign wrong /* instead of */

Mt7623 has i2c and i2s exported but it still actually requires another codec module such as mt8960 to finalize the complete audio thing. I remember the bpi team is working on design and manufacturing the module as daughter board on bpir2, but for what status currently is I think we need @garywang or @noralee to have comments more.

thanks does the trick. i have compile the project_test branch with audio and BT.

is audio working? i tried to find out, whats needed for it…there are some changes which seemed not be required for audio…

refererence:

dtsi:

sound:sound@11220000 {
	compatible = "mediatek,mt7623-rfb-machine";
	#address-cells = <2>;
	#size-cells = <2>;
	 reg = <0 0x11220000 0 0x2000>,
	       <0 0x112A0000 0 0x20000>;
	interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
		     <GIC_SPI 132 IRQ_TYPE_LEVEL_LOW>;
	power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
	clocks = <&infracfg CLK_INFRA_AUDIO>,
		 <&topckgen CLK_TOP_AUD_MUX1_SEL>,
		 <&topckgen CLK_TOP_AUD_MUX2_SEL>,
		 <&topckgen CLK_TOP_AUD_MUX1_DIV>,
		 <&topckgen CLK_TOP_AUD_MUX2_DIV>,
		 <&topckgen CLK_TOP_AUD_48K_TIMING>,
		 <&topckgen CLK_TOP_AUD_44K_TIMING>,
		 <&topckgen CLK_TOP_AUDPLL_MUX_SEL>,
		 <&topckgen CLK_TOP_APLL_SEL>,
		 <&topckgen CLK_TOP_AUD1PLL_98M>,
		 <&topckgen CLK_TOP_AUD2PLL_90M>,
		 <&topckgen CLK_TOP_HADDS2PLL_98M>,
		 <&topckgen CLK_TOP_HADDS2PLL_294M>,
		 <&topckgen CLK_TOP_AUDPLL>,
		 <&topckgen CLK_TOP_AUDPLL_D4>,
		 <&topckgen CLK_TOP_AUDPLL_D8>,
		 <&topckgen CLK_TOP_AUDPLL_D16>,
		 <&topckgen CLK_TOP_AUDPLL_D24>,
		 <&topckgen CLK_TOP_AUDINTBUS_SEL>,
		 <&clk26m>,
		 <&topckgen CLK_TOP_SYSPLL1_D4>,
		 <&topckgen CLK_TOP_AUD_K1_SRC_SEL>,
		 <&topckgen CLK_TOP_AUD_K2_SRC_SEL>,
		 <&topckgen CLK_TOP_AUD_K3_SRC_SEL>,
		 <&topckgen CLK_TOP_AUD_K4_SRC_SEL>,
		 <&topckgen CLK_TOP_AUD_K5_SRC_SEL>,
		 <&topckgen CLK_TOP_AUD_K6_SRC_SEL>,
		 <&topckgen CLK_TOP_AUD_K1_SRC_DIV>,
		 <&topckgen CLK_TOP_AUD_K2_SRC_DIV>,
		 <&topckgen CLK_TOP_AUD_K3_SRC_DIV>,
		 <&topckgen CLK_TOP_AUD_K4_SRC_DIV>,
		 <&topckgen CLK_TOP_AUD_K5_SRC_DIV>,
		 <&topckgen CLK_TOP_AUD_K6_SRC_DIV>,
		 <&topckgen CLK_TOP_AUD_I2S1_MCLK>,
		 <&topckgen CLK_TOP_AUD_I2S2_MCLK>,
		 <&topckgen CLK_TOP_AUD_I2S3_MCLK>,
		 <&topckgen CLK_TOP_AUD_I2S4_MCLK>,
		 <&topckgen CLK_TOP_AUD_I2S5_MCLK>,
		 <&topckgen CLK_TOP_AUD_I2S6_MCLK>,
		 <&topckgen CLK_TOP_ASM_M_SEL>,
		 <&topckgen CLK_TOP_ASM_H_SEL>,
		 <&topckgen CLK_TOP_UNIVPLL2_D4>,
		 <&topckgen CLK_TOP_UNIVPLL2_D2>,
		 <&topckgen CLK_TOP_SYSPLL_D5>,
		 <&topckgen CLK_TOP_UNIVPLL_D2>,
		 <&topckgen CLK_TOP_INTDIR_SEL>;

	clock-names = "infra_sys_audio_clk",
		      "top_audio_mux1_sel",
		      "top_audio_mux2_sel",
		      "top_audio_mux1_div",
		      "top_audio_mux2_div",
		      "top_audio_48k_timing",
		      "top_audio_44k_timing",
		      "top_audpll_mux_sel",
		      "top_apll_sel",
		      "top_aud1_pll_98M",
		      "top_aud2_pll_90M",
		      "top_hadds2_pll_98M",
		      "top_hadds2_pll_294M",
		      "top_audpll",
		      "top_audpll_d4",
		      "top_audpll_d8",
		      "top_audpll_d16",
		      "top_audpll_d24",
		      "top_audintbus_sel",
		      "clk_26m",
		      "top_syspll1_d4",
		      "top_aud_k1_src_sel",
		      "top_aud_k2_src_sel",
		      "top_aud_k3_src_sel",
		      "top_aud_k4_src_sel",
		      "top_aud_k5_src_sel",
		      "top_aud_k6_src_sel",
		      "top_aud_k1_src_div",
		      "top_aud_k2_src_div",
		      "top_aud_k3_src_div",
		      "top_aud_k4_src_div",
		      "top_aud_k5_src_div",
		      "top_aud_k6_src_div",
		      "top_aud_i2s1_mclk",
		      "top_aud_i2s2_mclk",
		      "top_aud_i2s3_mclk",
		      "top_aud_i2s4_mclk",
		      "top_aud_i2s5_mclk",
		      "top_aud_i2s6_mclk",
		      "top_asm_m_sel",
		      "top_asm_h_sel",
		      "top_univpll2_d4",
		      "top_univpll2_d2",
		      "top_syspll_d5",
		      "top_univpll_d2",
		      "top_intdir_sel";
};

mediatek,dummy_codec {
	compatible = "mediatek,dummy-codec";
};

mediatek,mt7623_audio {
	compatible = "mediatek,mt7623-audio", "mediatek,mt8521p-audio";
};

mediatek,mt7623_dai {
	compatible = "mediatek,mt7623-dai", "mediatek,mt8521p-dai";
};

bpi.dts:

&i2c1 {
	status = "okay";

	wm8960: wm8960@1a {
		compatible = "wlf,wm8960";
		reg = <0x1a>;
                clocks = <&topckgen CLK_TOP_AUD_I2S1_MCLK>;
                clock-names = "mclk";
                wlf,shared-lrclk;
	};
};

defconfig:

CONFIG_SND_SOC_WM8960=m
CONFIG_SND_SOC_MT2701=y
CONFIG_SND_SOC_MT2701_WM8960=y

driver files:

linux-mt/sound/soc/mediatek/Kconfig
linux-mt/sound/soc/mediatek/mt2701/Makefile
linux-mt/sound/soc/mediatek/mt2701/mt2701-wm8960.c
linux-mt/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c

i assume that preloader must not be changed

I could not try audio yet.

added an audio-branch where i added the changes from 4.4…if i have not forgotten anthing (driver itself c-file was already present)